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![Andy Shevchenko](/assets/img/avatar_default.png)
The infamous commitc440eee1a7
("Staging: staging: fbtft: Switch to the GPIO descriptor interface") broke GPIO handling completely. It has already four commits to rectify and it seems not enough. In order to fix the mess here we: 1) Set default to "inactive" for all requested pins 2) Fix CS#, RD#, and WR# pins polarity since it's active low and GPIO descriptor interface takes it into consideration from the Device Tree or ACPI 3) Consolidate chip activation (CS# assertion) under default ->reset() callback To summarize the expectations about polarity for GPIOs: RD# Low WR# Low CS# Low RESET# Low DC or RS High RW High Data 0 .. 15 High See also Adafruit learning course [1] for the example of the schematics. While at it, drop unneeded NULL checks, since GPIO API is tolerant to that. [1]: https://learn.adafruit.com/adafruit-2-8-and-3-2-color-tft-touchscreen-breakout-v2/downloads Fixes:92e3e88488
("Staging: fbtft: Fix GPIO handling") Fixes:b918d1c270
("Staging: fbtft: Fix reset assertion when using gpio descriptor") Fixes:dbc4f989c8
("Staging: fbtft: Fix probing of gpio descriptor") Fixes:c440eee1a7
("Staging: fbtft: Switch to the gpio descriptor interface") Cc: Jan Sebastian Götte <linux@jaseg.net> Cc: Nishad Kamdar <nishadkamdar@gmail.com> Reviewed-by: Phil Reid <preid@electromag.com.au> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20210503172114.27891-2-andriy.shevchenko@linux.intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
171 lines
4.1 KiB
C
171 lines
4.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* FB driver for the uPD161704 LCD Controller
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*
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* Copyright (C) 2014 Seong-Woo Kim
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*
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* Based on fb_ili9325.c by Noralf Tronnes
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* Based on ili9325.c by Jeroen Domburg
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* Init code from UTFT library by Henning Karlsen
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include "fbtft.h"
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#define DRVNAME "fb_bd663474"
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#define WIDTH 240
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#define HEIGHT 320
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#define BPP 16
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static int init_display(struct fbtft_par *par)
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{
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par->fbtftops.reset(par);
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/* Initialization sequence from Lib_UTFT */
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/* oscillator start */
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write_reg(par, 0x000, 0x0001); /*oscillator 0: stop, 1: operation */
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mdelay(10);
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/* Power settings */
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write_reg(par, 0x100, 0x0000); /* power supply setup */
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write_reg(par, 0x101, 0x0000);
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write_reg(par, 0x102, 0x3110);
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write_reg(par, 0x103, 0xe200);
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write_reg(par, 0x110, 0x009d);
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write_reg(par, 0x111, 0x0022);
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write_reg(par, 0x100, 0x0120);
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mdelay(20);
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write_reg(par, 0x100, 0x3120);
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mdelay(80);
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/* Display control */
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write_reg(par, 0x001, 0x0100);
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write_reg(par, 0x002, 0x0000);
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write_reg(par, 0x003, 0x1230);
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write_reg(par, 0x006, 0x0000);
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write_reg(par, 0x007, 0x0101);
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write_reg(par, 0x008, 0x0808);
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write_reg(par, 0x009, 0x0000);
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write_reg(par, 0x00b, 0x0000);
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write_reg(par, 0x00c, 0x0000);
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write_reg(par, 0x00d, 0x0018);
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/* LTPS control settings */
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write_reg(par, 0x012, 0x0000);
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write_reg(par, 0x013, 0x0000);
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write_reg(par, 0x018, 0x0000);
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write_reg(par, 0x019, 0x0000);
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write_reg(par, 0x203, 0x0000);
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write_reg(par, 0x204, 0x0000);
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write_reg(par, 0x210, 0x0000);
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write_reg(par, 0x211, 0x00ef);
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write_reg(par, 0x212, 0x0000);
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write_reg(par, 0x213, 0x013f);
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write_reg(par, 0x214, 0x0000);
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write_reg(par, 0x215, 0x0000);
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write_reg(par, 0x216, 0x0000);
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write_reg(par, 0x217, 0x0000);
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/* Gray scale settings */
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write_reg(par, 0x300, 0x5343);
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write_reg(par, 0x301, 0x1021);
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write_reg(par, 0x302, 0x0003);
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write_reg(par, 0x303, 0x0011);
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write_reg(par, 0x304, 0x050a);
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write_reg(par, 0x305, 0x4342);
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write_reg(par, 0x306, 0x1100);
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write_reg(par, 0x307, 0x0003);
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write_reg(par, 0x308, 0x1201);
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write_reg(par, 0x309, 0x050a);
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/* RAM access settings */
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write_reg(par, 0x400, 0x4027);
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write_reg(par, 0x401, 0x0000);
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write_reg(par, 0x402, 0x0000); /* First screen drive position (1) */
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write_reg(par, 0x403, 0x013f); /* First screen drive position (2) */
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write_reg(par, 0x404, 0x0000);
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write_reg(par, 0x200, 0x0000);
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write_reg(par, 0x201, 0x0000);
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write_reg(par, 0x100, 0x7120);
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write_reg(par, 0x007, 0x0103);
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mdelay(10);
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write_reg(par, 0x007, 0x0113);
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return 0;
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}
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static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
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{
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switch (par->info->var.rotate) {
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/* R200h = Horizontal GRAM Start Address */
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/* R201h = Vertical GRAM Start Address */
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case 0:
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write_reg(par, 0x0200, xs);
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write_reg(par, 0x0201, ys);
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break;
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case 180:
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write_reg(par, 0x0200, WIDTH - 1 - xs);
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write_reg(par, 0x0201, HEIGHT - 1 - ys);
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break;
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case 270:
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write_reg(par, 0x0200, WIDTH - 1 - ys);
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write_reg(par, 0x0201, xs);
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break;
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case 90:
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write_reg(par, 0x0200, ys);
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write_reg(par, 0x0201, HEIGHT - 1 - xs);
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break;
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}
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write_reg(par, 0x202); /* Write Data to GRAM */
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}
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static int set_var(struct fbtft_par *par)
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{
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switch (par->info->var.rotate) {
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/* AM: GRAM update direction */
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case 0:
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write_reg(par, 0x003, 0x1230);
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break;
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case 180:
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write_reg(par, 0x003, 0x1200);
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break;
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case 270:
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write_reg(par, 0x003, 0x1228);
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break;
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case 90:
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write_reg(par, 0x003, 0x1218);
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break;
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}
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return 0;
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}
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static struct fbtft_display display = {
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.regwidth = 16,
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.width = WIDTH,
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.height = HEIGHT,
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.bpp = BPP,
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.fbtftops = {
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.init_display = init_display,
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.set_addr_win = set_addr_win,
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.set_var = set_var,
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},
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};
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FBTFT_REGISTER_DRIVER(DRVNAME, "hitachi,bd663474", &display);
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MODULE_ALIAS("spi:" DRVNAME);
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MODULE_ALIAS("platform:" DRVNAME);
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MODULE_ALIAS("spi:bd663474");
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MODULE_ALIAS("platform:bd663474");
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MODULE_DESCRIPTION("FB driver for the uPD161704 LCD Controller");
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MODULE_AUTHOR("Seong-Woo Kim");
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MODULE_LICENSE("GPL");
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