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78c00ccc52
Now that the SPDX tag is in all fbtft files, that identifies the license in a specific and legally-defined manner. So the extra GPL text wording can be removed as it is no longer needed at all. This is done on a quest to remove the 700+ different ways that files in the kernel describe the GPL license text. And there's unneeded stuff like the address (sometimes incorrect) for the FSF which is never needed. No copyright headers or other non-license-description text was removed. Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
148 lines
3.5 KiB
C
148 lines
3.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* FB driver for the HX8353D LCD Controller
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*
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* Copyright (c) 2014 Petr Olivka
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* Copyright (c) 2013 Noralf Tronnes
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <video/mipi_display.h>
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#include "fbtft.h"
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#define DRVNAME "fb_hx8353d"
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#define DEFAULT_GAMMA "50 77 40 08 BF 00 03 0F 00 01 73 00 72 03 B0 0F 08 00 0F"
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static int init_display(struct fbtft_par *par)
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{
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par->fbtftops.reset(par);
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mdelay(150);
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/* SETEXTC */
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write_reg(par, 0xB9, 0xFF, 0x83, 0x53);
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/* RADJ */
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write_reg(par, 0xB0, 0x3C, 0x01);
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/* VCOM */
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write_reg(par, 0xB6, 0x94, 0x6C, 0x50);
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/* PWR */
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write_reg(par, 0xB1, 0x00, 0x01, 0x1B, 0x03, 0x01, 0x08, 0x77, 0x89);
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/* COLMOD */
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write_reg(par, 0x3A, 0x05);
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/* MEM ACCESS */
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write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, 0xC0);
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/* SLPOUT - Sleep out & booster on */
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write_reg(par, MIPI_DCS_EXIT_SLEEP_MODE);
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mdelay(150);
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/* DISPON - Display On */
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write_reg(par, MIPI_DCS_SET_DISPLAY_ON);
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/* RGBSET */
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write_reg(par, MIPI_DCS_WRITE_LUT,
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0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30,
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32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62,
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0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
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16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
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32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
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48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
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0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30,
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32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62);
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return 0;
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};
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static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
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{
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/* column address */
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write_reg(par, 0x2a, xs >> 8, xs & 0xff, xe >> 8, xe & 0xff);
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/* Row address */
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write_reg(par, 0x2b, ys >> 8, ys & 0xff, ye >> 8, ye & 0xff);
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/* memory write */
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write_reg(par, 0x2c);
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}
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#define my BIT(7)
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#define mx BIT(6)
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#define mv BIT(5)
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static int set_var(struct fbtft_par *par)
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{
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/*
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* madctl - memory data access control
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* rgb/bgr:
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* 1. mode selection pin srgb
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* rgb h/w pin for color filter setting: 0=rgb, 1=bgr
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* 2. madctl rgb bit
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* rgb-bgr order color filter panel: 0=rgb, 1=bgr
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*/
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switch (par->info->var.rotate) {
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case 0:
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write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
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mx | my | (par->bgr << 3));
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break;
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case 270:
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write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
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my | mv | (par->bgr << 3));
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break;
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case 180:
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write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
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par->bgr << 3);
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break;
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case 90:
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write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
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mx | mv | (par->bgr << 3));
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break;
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}
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return 0;
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}
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/* gamma string format: */
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static int set_gamma(struct fbtft_par *par, u32 *curves)
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{
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write_reg(par, 0xE0,
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curves[0], curves[1], curves[2], curves[3],
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curves[4], curves[5], curves[6], curves[7],
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curves[8], curves[9], curves[10], curves[11],
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curves[12], curves[13], curves[14], curves[15],
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curves[16], curves[17], curves[18]);
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return 0;
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}
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static struct fbtft_display display = {
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.regwidth = 8,
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.width = 128,
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.height = 160,
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.gamma_num = 1,
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.gamma_len = 19,
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.gamma = DEFAULT_GAMMA,
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.fbtftops = {
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.init_display = init_display,
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.set_addr_win = set_addr_win,
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.set_var = set_var,
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.set_gamma = set_gamma,
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},
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};
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FBTFT_REGISTER_DRIVER(DRVNAME, "himax,hx8353d", &display);
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MODULE_ALIAS("spi:" DRVNAME);
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MODULE_ALIAS("platform:" DRVNAME);
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MODULE_ALIAS("spi:hx8353d");
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MODULE_ALIAS("platform:hx8353d");
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MODULE_DESCRIPTION("FB driver for the HX8353D LCD Controller");
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MODULE_AUTHOR("Petr Olivka");
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MODULE_LICENSE("GPL");
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