Dinh Nguyen 5585f73175 clk: socfpga: Fix integer overflow in clock calculation ... Use 64-bit integer for calculating clock rate. Also use do_div for the 64-bit division. Signed-off-by: Graham Moore <grmoore@altera.com> Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Mike Turquette <mturquette@linaro.org>		2014-02-26 12:23:29 -08:00
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clk-gate.c	clk: socfpga: Add a clk-phase property to the "altr,socfpga-gate-clk"	2014-02-18 14:08:14 -08:00
clk-periph.c	clk: socfpga: split clk code	2014-02-18 14:08:13 -08:00
clk-pll.c	clk: socfpga: Fix integer overflow in clock calculation	2014-02-26 12:23:29 -08:00
clk.c	clk: socfpga: split clk code	2014-02-18 14:08:13 -08:00
clk.h	clk: socfpga: split clk code	2014-02-18 14:08:13 -08:00
Makefile	clk: socfpga: split clk code	2014-02-18 14:08:13 -08:00