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![Deepak SIKRI](/assets/img/avatar_default.png)
This patch explicitly defines the CSUM offload engine type which need (not mandatory) to be passed from the platform code. STMMAC core supports two check sum offload engine types- Type-1 & Type-2. Also, there are STMMAC cores that do not have the check sum offload capabilities. The behaviour of Type-1 & Type-2 cores related to provision of checksum increases the packet length for Type-1 cores by 2, as the checksum is appended at the end of data packet and the same is made accountable in the DMA status. The STMMAC cores beyond Version-3.5 provide HW interface registers which allows the user to read the HW capabilities, while to support the previous cores the information related to HW capabilities has to be provided from the platform code. The Type-1 cores which do not have the HW register interface need this information. This patch also updates the driver's doc. Signed-off-by: Deepak Sikri <deepak.sikri@st.com> Hacked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
286 lines
11 KiB
Text
286 lines
11 KiB
Text
STMicroelectronics 10/100/1000 Synopsys Ethernet driver
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Copyright (C) 2007-2010 STMicroelectronics Ltd
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Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
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This is the driver for the MAC 10/100/1000 on-chip Ethernet controllers
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(Synopsys IP blocks).
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Currently this network device driver is for all STM embedded MAC/GMAC
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(i.e. 7xxx/5xxx SoCs), SPEAr (arm), Loongson1B (mips) and XLINX XC2V3000
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FF1152AMT0221 D1215994A VIRTEX FPGA board.
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DWC Ether MAC 10/100/1000 Universal version 3.60a (and older) and DWC Ether MAC 10/100
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Universal version 4.0 have been used for developing this driver.
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This driver supports both the platform bus and PCI.
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Please, for more information also visit: www.stlinux.com
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1) Kernel Configuration
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The kernel configuration option is STMMAC_ETH:
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Device Drivers ---> Network device support ---> Ethernet (1000 Mbit) --->
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STMicroelectronics 10/100/1000 Ethernet driver (STMMAC_ETH)
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2) Driver parameters list:
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debug: message level (0: no output, 16: all);
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phyaddr: to manually provide the physical address to the PHY device;
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dma_rxsize: DMA rx ring size;
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dma_txsize: DMA tx ring size;
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buf_sz: DMA buffer size;
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tc: control the HW FIFO threshold;
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tx_coe: Enable/Disable Tx Checksum Offload engine;
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watchdog: transmit timeout (in milliseconds);
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flow_ctrl: Flow control ability [on/off];
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pause: Flow Control Pause Time;
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tmrate: timer period (only if timer optimisation is configured).
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3) Command line options
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Driver parameters can be also passed in command line by using:
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stmmaceth=dma_rxsize:128,dma_txsize:512
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4) Driver information and notes
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4.1) Transmit process
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The xmit method is invoked when the kernel needs to transmit a packet; it sets
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the descriptors in the ring and informs the DMA engine that there is a packet
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ready to be transmitted.
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Once the controller has finished transmitting the packet, an interrupt is
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triggered; So the driver will be able to release the socket buffers.
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By default, the driver sets the NETIF_F_SG bit in the features field of the
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net_device structure enabling the scatter/gather feature.
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4.2) Receive process
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When one or more packets are received, an interrupt happens. The interrupts
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are not queued so the driver has to scan all the descriptors in the ring during
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the receive process.
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This is based on NAPI so the interrupt handler signals only if there is work to be
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done, and it exits.
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Then the poll method will be scheduled at some future point.
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The incoming packets are stored, by the DMA, in a list of pre-allocated socket
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buffers in order to avoid the memcpy (Zero-copy).
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4.3) Timer-Driver Interrupt
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Instead of having the device that asynchronously notifies the frame receptions, the
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driver configures a timer to generate an interrupt at regular intervals.
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Based on the granularity of the timer, the frames that are received by the device
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will experience different levels of latency. Some NICs have dedicated timer
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device to perform this task. STMMAC can use either the RTC device or the TMU
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channel 2 on STLinux platforms.
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The timers frequency can be passed to the driver as parameter; when change it,
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take care of both hardware capability and network stability/performance impact.
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Several performance tests on STM platforms showed this optimisation allows to spare
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the CPU while having the maximum throughput.
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4.4) WOL
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Wake up on Lan feature through Magic and Unicast frames are supported for the GMAC
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core.
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4.5) DMA descriptors
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Driver handles both normal and enhanced descriptors. The latter has been only
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tested on DWC Ether MAC 10/100/1000 Universal version 3.41a and later.
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STMMAC supports DMA descriptor to operate both in dual buffer (RING)
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and linked-list(CHAINED) mode. In RING each descriptor points to two
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data buffer pointers whereas in CHAINED mode they point to only one data
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buffer pointer. RING mode is the default.
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In CHAINED mode each descriptor will have pointer to next descriptor in
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the list, hence creating the explicit chaining in the descriptor itself,
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whereas such explicit chaining is not possible in RING mode.
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4.6) Ethtool support
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Ethtool is supported. Driver statistics and internal errors can be taken using:
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ethtool -S ethX command. It is possible to dump registers etc.
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4.7) Jumbo and Segmentation Offloading
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Jumbo frames are supported and tested for the GMAC.
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The GSO has been also added but it's performed in software.
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LRO is not supported.
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4.8) Physical
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The driver is compatible with PAL to work with PHY and GPHY devices.
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4.9) Platform information
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Several driver's information can be passed through the platform
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These are included in the include/linux/stmmac.h header file
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and detailed below as well:
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struct plat_stmmacenet_data {
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int bus_id;
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int phy_addr;
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int interface;
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struct stmmac_mdio_bus_data *mdio_bus_data;
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int pbl;
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int clk_csr;
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int has_gmac;
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int enh_desc;
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int tx_coe;
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int rx_coe;
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int bugged_jumbo;
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int pmt;
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int force_sf_dma_mode;
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void (*fix_mac_speed)(void *priv, unsigned int speed);
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void (*bus_setup)(void __iomem *ioaddr);
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int (*init)(struct platform_device *pdev);
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void (*exit)(struct platform_device *pdev);
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void *bsp_priv;
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};
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Where:
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o bus_id: bus identifier.
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o phy_addr: the physical address can be passed from the platform.
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If it is set to -1 the driver will automatically
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detect it at run-time by probing all the 32 addresses.
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o interface: PHY device's interface.
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o mdio_bus_data: specific platform fields for the MDIO bus.
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o pbl: the Programmable Burst Length is maximum number of beats to
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be transferred in one DMA transaction.
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GMAC also enables the 4xPBL by default.
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o clk_csr: CSR Clock range selection.
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o has_gmac: uses the GMAC core.
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o enh_desc: if sets the MAC will use the enhanced descriptor structure.
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o tx_coe: core is able to perform the tx csum in HW.
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o rx_coe: the supports three check sum offloading engine types:
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type_1, type_2 (full csum) and no RX coe.
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o bugged_jumbo: some HWs are not able to perform the csum in HW for
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over-sized frames due to limited buffer sizes.
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Setting this flag the csum will be done in SW on
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JUMBO frames.
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o pmt: core has the embedded power module (optional).
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o force_sf_dma_mode: force DMA to use the Store and Forward mode
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instead of the Threshold.
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o fix_mac_speed: this callback is used for modifying some syscfg registers
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(on ST SoCs) according to the link speed negotiated by the
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physical layer .
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o bus_setup: perform HW setup of the bus. For example, on some ST platforms
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this field is used to configure the AMBA bridge to generate more
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efficient STBus traffic.
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o init/exit: callbacks used for calling a custom initialisation;
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this is sometime necessary on some platforms (e.g. ST boxes)
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where the HW needs to have set some PIO lines or system cfg
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registers.
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o custom_cfg: this is a custom configuration that can be passed while
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initialising the resources.
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The we have:
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struct stmmac_mdio_bus_data {
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int bus_id;
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int (*phy_reset)(void *priv);
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unsigned int phy_mask;
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int *irqs;
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int probed_phy_irq;
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};
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Where:
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o bus_id: bus identifier;
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o phy_reset: hook to reset the phy device attached to the bus.
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o phy_mask: phy mask passed when register the MDIO bus within the driver.
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o irqs: list of IRQs, one per PHY.
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o probed_phy_irq: if irqs is NULL, use this for probed PHY.
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Below an example how the structures above are using on ST platforms.
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static struct plat_stmmacenet_data stxYYY_ethernet_platform_data = {
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.pbl = 32,
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.has_gmac = 0,
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.enh_desc = 0,
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.fix_mac_speed = stxYYY_ethernet_fix_mac_speed,
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|-> to write an internal syscfg
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| on this platform when the
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| link speed changes from 10 to
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| 100 and viceversa
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.init = &stmmac_claim_resource,
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|-> On ST SoC this calls own "PAD"
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| manager framework to claim
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| all the resources necessary
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| (GPIO ...). The .custom_cfg field
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| is used to pass a custom config.
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};
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Below the usage of the stmmac_mdio_bus_data: on this SoC, in fact,
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there are two MAC cores: one MAC is for MDIO Bus/PHY emulation
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with fixed_link support.
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static struct stmmac_mdio_bus_data stmmac1_mdio_bus = {
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.bus_id = 1,
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|-> phy device on the bus_id 1
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.phy_reset = phy_reset;
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|-> function to provide the phy_reset on this board
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.phy_mask = 0,
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};
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static struct fixed_phy_status stmmac0_fixed_phy_status = {
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.link = 1,
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.speed = 100,
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.duplex = 1,
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};
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During the board's device_init we can configure the first
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MAC for fixed_link by calling:
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fixed_phy_add(PHY_POLL, 1, &stmmac0_fixed_phy_status));)
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and the second one, with a real PHY device attached to the bus,
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by using the stmmac_mdio_bus_data structure (to provide the id, the
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reset procedure etc).
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4.10) List of source files:
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o Kconfig
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o Makefile
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o stmmac_main.c: main network device driver;
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o stmmac_mdio.c: mdio functions;
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o stmmac_ethtool.c: ethtool support;
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o stmmac_timer.[ch]: timer code used for mitigating the driver dma interrupts
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Only tested on ST40 platforms based.
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o stmmac.h: private driver structure;
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o common.h: common definitions and VFTs;
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o descs.h: descriptor structure definitions;
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o dwmac1000_core.c: GMAC core functions;
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o dwmac1000_dma.c: dma functions for the GMAC chip;
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o dwmac1000.h: specific header file for the GMAC;
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o dwmac100_core: MAC 100 core and dma code;
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o dwmac100_dma.c: dma funtions for the MAC chip;
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o dwmac1000.h: specific header file for the MAC;
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o dwmac_lib.c: generic DMA functions shared among chips
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o enh_desc.c: functions for handling enhanced descriptors
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o norm_desc.c: functions for handling normal descriptors
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5) Debug Information
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The driver exports many information i.e. internal statistics,
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debug information, MAC and DMA registers etc.
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These can be read in several ways depending on the
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type of the information actually needed.
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For example a user can be use the ethtool support
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to get statistics: e.g. using: ethtool -S ethX
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(that shows the Management counters (MMC) if supported)
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or sees the MAC/DMA registers: e.g. using: ethtool -d ethX
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Compiling the Kernel with CONFIG_DEBUG_FS and enabling the
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STMMAC_DEBUG_FS option the driver will export the following
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debugfs entries:
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/sys/kernel/debug/stmmaceth/descriptors_status
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To show the DMA TX/RX descriptor rings
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Developer can also use the "debug" module parameter to get
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further debug information.
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In the end, there are other macros (that cannot be enabled
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via menuconfig) to turn-on the RX/TX DMA debugging,
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specific MAC core debug printk etc. Others to enable the
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debug in the TX and RX processes.
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All these are only useful during the developing stage
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and should never enabled inside the code for general usage.
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In fact, these can generate an huge amount of debug messages.
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6) TODO:
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o XGMAC is not supported.
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o Add the EEE - Energy Efficient Ethernet
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o Add the PTP - precision time protocol
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