Will Deacon 5686b06cea arm64: lockref: add support for lockless lockrefs using cmpxchg ... Our spinlocks are only 32-bit (2x16-bit tickets) and our cmpxchg can deal with 8-bytes (as one would hope!). This patch wires up the cmpxchg-based lockless lockref implementation for arm64. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>		2013-10-24 15:46:34 +01:00
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asm	arm64: lockref: add support for lockless lockrefs using cmpxchg	2013-10-24 15:46:34 +01:00
uapi/asm	arm64: KVM: enable initialization of a 32bit vcpu	2013-06-12 16:42:18 +01:00