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![Krzysztof Kozlowski](/assets/img/avatar_default.png)
Several functions use for_each_child_of_node() loop with a break to find
a matching child node. Although each iteration of
for_each_child_of_node puts the previous node, but early exit from loop
misses it. This leads to leak of device node.
Cc: <stable@vger.kernel.org>
Fixes: 9a2c1c3b91
("pinctrl: samsung: Allow grouping multiple pinmux/pinconf nodes")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
1304 lines
34 KiB
C
1304 lines
34 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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//
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// pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
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//
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// Copyright (c) 2012 Samsung Electronics Co., Ltd.
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// http://www.samsung.com
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// Copyright (c) 2012 Linaro Ltd
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// http://www.linaro.org
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//
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// Author: Thomas Abraham <thomas.ab@samsung.com>
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//
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// This driver implements the Samsung pinctrl driver. It supports setting up of
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// pinmux and pinconf configurations. The gpiolib interface is also included.
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// External interrupt (gpio and wakeup) support are not included in this driver
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// but provides extensions to which platform specific implementation of the gpio
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// and wakeup interrupts can be hooked to.
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/err.h>
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#include <linux/gpio/driver.h>
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#include <linux/irqdomain.h>
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#include <linux/of_device.h>
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#include <linux/spinlock.h>
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#include <dt-bindings/pinctrl/samsung.h>
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#include "../core.h"
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#include "pinctrl-samsung.h"
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/* maximum number of the memory resources */
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#define SAMSUNG_PINCTRL_NUM_RESOURCES 2
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/* list of all possible config options supported */
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static struct pin_config {
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const char *property;
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enum pincfg_type param;
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} cfg_params[] = {
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{ "samsung,pin-pud", PINCFG_TYPE_PUD },
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{ "samsung,pin-drv", PINCFG_TYPE_DRV },
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{ "samsung,pin-con-pdn", PINCFG_TYPE_CON_PDN },
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{ "samsung,pin-pud-pdn", PINCFG_TYPE_PUD_PDN },
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{ "samsung,pin-val", PINCFG_TYPE_DAT },
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};
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static unsigned int pin_base;
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static int samsung_get_group_count(struct pinctrl_dev *pctldev)
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{
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struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev);
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return pmx->nr_groups;
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}
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static const char *samsung_get_group_name(struct pinctrl_dev *pctldev,
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unsigned group)
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{
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struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev);
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return pmx->pin_groups[group].name;
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}
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static int samsung_get_group_pins(struct pinctrl_dev *pctldev,
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unsigned group,
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const unsigned **pins,
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unsigned *num_pins)
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{
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struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev);
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*pins = pmx->pin_groups[group].pins;
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*num_pins = pmx->pin_groups[group].num_pins;
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return 0;
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}
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static int reserve_map(struct device *dev, struct pinctrl_map **map,
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unsigned *reserved_maps, unsigned *num_maps,
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unsigned reserve)
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{
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unsigned old_num = *reserved_maps;
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unsigned new_num = *num_maps + reserve;
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struct pinctrl_map *new_map;
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if (old_num >= new_num)
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return 0;
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new_map = krealloc(*map, sizeof(*new_map) * new_num, GFP_KERNEL);
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if (!new_map)
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return -ENOMEM;
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memset(new_map + old_num, 0, (new_num - old_num) * sizeof(*new_map));
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*map = new_map;
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*reserved_maps = new_num;
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return 0;
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}
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static int add_map_mux(struct pinctrl_map **map, unsigned *reserved_maps,
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unsigned *num_maps, const char *group,
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const char *function)
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{
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if (WARN_ON(*num_maps == *reserved_maps))
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return -ENOSPC;
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(*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
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(*map)[*num_maps].data.mux.group = group;
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(*map)[*num_maps].data.mux.function = function;
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(*num_maps)++;
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return 0;
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}
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static int add_map_configs(struct device *dev, struct pinctrl_map **map,
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unsigned *reserved_maps, unsigned *num_maps,
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const char *group, unsigned long *configs,
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unsigned num_configs)
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{
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unsigned long *dup_configs;
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if (WARN_ON(*num_maps == *reserved_maps))
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return -ENOSPC;
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dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs),
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GFP_KERNEL);
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if (!dup_configs)
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return -ENOMEM;
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(*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_GROUP;
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(*map)[*num_maps].data.configs.group_or_pin = group;
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(*map)[*num_maps].data.configs.configs = dup_configs;
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(*map)[*num_maps].data.configs.num_configs = num_configs;
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(*num_maps)++;
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return 0;
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}
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static int add_config(struct device *dev, unsigned long **configs,
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unsigned *num_configs, unsigned long config)
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{
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unsigned old_num = *num_configs;
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unsigned new_num = old_num + 1;
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unsigned long *new_configs;
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new_configs = krealloc(*configs, sizeof(*new_configs) * new_num,
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GFP_KERNEL);
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if (!new_configs)
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return -ENOMEM;
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new_configs[old_num] = config;
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*configs = new_configs;
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*num_configs = new_num;
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return 0;
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}
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static void samsung_dt_free_map(struct pinctrl_dev *pctldev,
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struct pinctrl_map *map,
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unsigned num_maps)
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{
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int i;
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for (i = 0; i < num_maps; i++)
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if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP)
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kfree(map[i].data.configs.configs);
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kfree(map);
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}
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static int samsung_dt_subnode_to_map(struct samsung_pinctrl_drv_data *drvdata,
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struct device *dev,
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struct device_node *np,
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struct pinctrl_map **map,
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unsigned *reserved_maps,
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unsigned *num_maps)
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{
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int ret, i;
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u32 val;
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unsigned long config;
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unsigned long *configs = NULL;
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unsigned num_configs = 0;
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unsigned reserve;
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struct property *prop;
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const char *group;
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bool has_func = false;
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ret = of_property_read_u32(np, "samsung,pin-function", &val);
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if (!ret)
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has_func = true;
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for (i = 0; i < ARRAY_SIZE(cfg_params); i++) {
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ret = of_property_read_u32(np, cfg_params[i].property, &val);
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if (!ret) {
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config = PINCFG_PACK(cfg_params[i].param, val);
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ret = add_config(dev, &configs, &num_configs, config);
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if (ret < 0)
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goto exit;
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/* EINVAL=missing, which is fine since it's optional */
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} else if (ret != -EINVAL) {
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dev_err(dev, "could not parse property %s\n",
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cfg_params[i].property);
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}
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}
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reserve = 0;
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if (has_func)
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reserve++;
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if (num_configs)
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reserve++;
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ret = of_property_count_strings(np, "samsung,pins");
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if (ret < 0) {
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dev_err(dev, "could not parse property samsung,pins\n");
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goto exit;
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}
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reserve *= ret;
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ret = reserve_map(dev, map, reserved_maps, num_maps, reserve);
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if (ret < 0)
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goto exit;
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of_property_for_each_string(np, "samsung,pins", prop, group) {
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if (has_func) {
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ret = add_map_mux(map, reserved_maps,
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num_maps, group, np->full_name);
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if (ret < 0)
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goto exit;
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}
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if (num_configs) {
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ret = add_map_configs(dev, map, reserved_maps,
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num_maps, group, configs,
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num_configs);
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if (ret < 0)
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goto exit;
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}
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}
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ret = 0;
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exit:
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kfree(configs);
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return ret;
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}
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static int samsung_dt_node_to_map(struct pinctrl_dev *pctldev,
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struct device_node *np_config,
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struct pinctrl_map **map,
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unsigned *num_maps)
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{
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struct samsung_pinctrl_drv_data *drvdata;
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unsigned reserved_maps;
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struct device_node *np;
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int ret;
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drvdata = pinctrl_dev_get_drvdata(pctldev);
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reserved_maps = 0;
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*map = NULL;
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*num_maps = 0;
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if (!of_get_child_count(np_config))
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return samsung_dt_subnode_to_map(drvdata, pctldev->dev,
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np_config, map,
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&reserved_maps,
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num_maps);
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for_each_child_of_node(np_config, np) {
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ret = samsung_dt_subnode_to_map(drvdata, pctldev->dev, np, map,
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&reserved_maps, num_maps);
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if (ret < 0) {
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samsung_dt_free_map(pctldev, *map, *num_maps);
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of_node_put(np);
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return ret;
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}
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}
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return 0;
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}
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#ifdef CONFIG_DEBUG_FS
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/* Forward declaration which can be used by samsung_pin_dbg_show */
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static int samsung_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
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unsigned long *config);
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static const char * const reg_names[] = {"CON", "DAT", "PUD", "DRV", "CON_PDN",
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"PUD_PDN"};
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static void samsung_pin_dbg_show(struct pinctrl_dev *pctldev,
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struct seq_file *s, unsigned int pin)
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{
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enum pincfg_type cfg_type;
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unsigned long config;
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int ret;
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for (cfg_type = 0; cfg_type < PINCFG_TYPE_NUM; cfg_type++) {
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config = PINCFG_PACK(cfg_type, 0);
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ret = samsung_pinconf_get(pctldev, pin, &config);
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if (ret < 0)
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continue;
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seq_printf(s, " %s(0x%lx)", reg_names[cfg_type],
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PINCFG_UNPACK_VALUE(config));
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}
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}
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#endif
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/* list of pinctrl callbacks for the pinctrl core */
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static const struct pinctrl_ops samsung_pctrl_ops = {
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.get_groups_count = samsung_get_group_count,
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.get_group_name = samsung_get_group_name,
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.get_group_pins = samsung_get_group_pins,
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.dt_node_to_map = samsung_dt_node_to_map,
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.dt_free_map = samsung_dt_free_map,
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#ifdef CONFIG_DEBUG_FS
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.pin_dbg_show = samsung_pin_dbg_show,
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#endif
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};
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/* check if the selector is a valid pin function selector */
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static int samsung_get_functions_count(struct pinctrl_dev *pctldev)
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{
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struct samsung_pinctrl_drv_data *drvdata;
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drvdata = pinctrl_dev_get_drvdata(pctldev);
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return drvdata->nr_functions;
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}
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/* return the name of the pin function specified */
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static const char *samsung_pinmux_get_fname(struct pinctrl_dev *pctldev,
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unsigned selector)
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{
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struct samsung_pinctrl_drv_data *drvdata;
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drvdata = pinctrl_dev_get_drvdata(pctldev);
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return drvdata->pmx_functions[selector].name;
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}
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/* return the groups associated for the specified function selector */
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static int samsung_pinmux_get_groups(struct pinctrl_dev *pctldev,
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unsigned selector, const char * const **groups,
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unsigned * const num_groups)
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{
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struct samsung_pinctrl_drv_data *drvdata;
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drvdata = pinctrl_dev_get_drvdata(pctldev);
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*groups = drvdata->pmx_functions[selector].groups;
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*num_groups = drvdata->pmx_functions[selector].num_groups;
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return 0;
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}
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/*
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* given a pin number that is local to a pin controller, find out the pin bank
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* and the register base of the pin bank.
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*/
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static void pin_to_reg_bank(struct samsung_pinctrl_drv_data *drvdata,
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unsigned pin, void __iomem **reg, u32 *offset,
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struct samsung_pin_bank **bank)
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{
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struct samsung_pin_bank *b;
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b = drvdata->pin_banks;
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while ((pin >= b->pin_base) &&
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((b->pin_base + b->nr_pins - 1) < pin))
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b++;
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*reg = b->pctl_base + b->pctl_offset;
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*offset = pin - b->pin_base;
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if (bank)
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*bank = b;
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}
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/* enable or disable a pinmux function */
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static void samsung_pinmux_setup(struct pinctrl_dev *pctldev, unsigned selector,
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unsigned group)
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{
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struct samsung_pinctrl_drv_data *drvdata;
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const struct samsung_pin_bank_type *type;
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struct samsung_pin_bank *bank;
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void __iomem *reg;
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u32 mask, shift, data, pin_offset;
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unsigned long flags;
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const struct samsung_pmx_func *func;
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const struct samsung_pin_group *grp;
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drvdata = pinctrl_dev_get_drvdata(pctldev);
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func = &drvdata->pmx_functions[selector];
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grp = &drvdata->pin_groups[group];
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pin_to_reg_bank(drvdata, grp->pins[0] - drvdata->pin_base,
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®, &pin_offset, &bank);
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type = bank->type;
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mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1;
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shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC];
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if (shift >= 32) {
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/* Some banks have two config registers */
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shift -= 32;
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reg += 4;
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}
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spin_lock_irqsave(&bank->slock, flags);
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data = readl(reg + type->reg_offset[PINCFG_TYPE_FUNC]);
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data &= ~(mask << shift);
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data |= func->val << shift;
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writel(data, reg + type->reg_offset[PINCFG_TYPE_FUNC]);
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spin_unlock_irqrestore(&bank->slock, flags);
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}
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/* enable a specified pinmux by writing to registers */
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static int samsung_pinmux_set_mux(struct pinctrl_dev *pctldev,
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unsigned selector,
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unsigned group)
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{
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samsung_pinmux_setup(pctldev, selector, group);
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return 0;
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}
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/* list of pinmux callbacks for the pinmux vertical in pinctrl core */
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static const struct pinmux_ops samsung_pinmux_ops = {
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.get_functions_count = samsung_get_functions_count,
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.get_function_name = samsung_pinmux_get_fname,
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.get_function_groups = samsung_pinmux_get_groups,
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.set_mux = samsung_pinmux_set_mux,
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};
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/* set or get the pin config settings for a specified pin */
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static int samsung_pinconf_rw(struct pinctrl_dev *pctldev, unsigned int pin,
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unsigned long *config, bool set)
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{
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struct samsung_pinctrl_drv_data *drvdata;
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const struct samsung_pin_bank_type *type;
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struct samsung_pin_bank *bank;
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void __iomem *reg_base;
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enum pincfg_type cfg_type = PINCFG_UNPACK_TYPE(*config);
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u32 data, width, pin_offset, mask, shift;
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u32 cfg_value, cfg_reg;
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unsigned long flags;
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drvdata = pinctrl_dev_get_drvdata(pctldev);
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pin_to_reg_bank(drvdata, pin - drvdata->pin_base, ®_base,
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&pin_offset, &bank);
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type = bank->type;
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if (cfg_type >= PINCFG_TYPE_NUM || !type->fld_width[cfg_type])
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return -EINVAL;
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|
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width = type->fld_width[cfg_type];
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cfg_reg = type->reg_offset[cfg_type];
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|
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spin_lock_irqsave(&bank->slock, flags);
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mask = (1 << width) - 1;
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shift = pin_offset * width;
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data = readl(reg_base + cfg_reg);
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if (set) {
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cfg_value = PINCFG_UNPACK_VALUE(*config);
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data &= ~(mask << shift);
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data |= (cfg_value << shift);
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writel(data, reg_base + cfg_reg);
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} else {
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data >>= shift;
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data &= mask;
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*config = PINCFG_PACK(cfg_type, data);
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}
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|
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spin_unlock_irqrestore(&bank->slock, flags);
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return 0;
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}
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|
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/* set the pin config settings for a specified pin */
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static int samsung_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
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unsigned long *configs, unsigned num_configs)
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{
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int i, ret;
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|
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for (i = 0; i < num_configs; i++) {
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ret = samsung_pinconf_rw(pctldev, pin, &configs[i], true);
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if (ret < 0)
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return ret;
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} /* for each config */
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|
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return 0;
|
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}
|
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|
|
/* get the pin config settings for a specified pin */
|
|
static int samsung_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
|
|
unsigned long *config)
|
|
{
|
|
return samsung_pinconf_rw(pctldev, pin, config, false);
|
|
}
|
|
|
|
/* set the pin config settings for a specified pin group */
|
|
static int samsung_pinconf_group_set(struct pinctrl_dev *pctldev,
|
|
unsigned group, unsigned long *configs,
|
|
unsigned num_configs)
|
|
{
|
|
struct samsung_pinctrl_drv_data *drvdata;
|
|
const unsigned int *pins;
|
|
unsigned int cnt;
|
|
|
|
drvdata = pinctrl_dev_get_drvdata(pctldev);
|
|
pins = drvdata->pin_groups[group].pins;
|
|
|
|
for (cnt = 0; cnt < drvdata->pin_groups[group].num_pins; cnt++)
|
|
samsung_pinconf_set(pctldev, pins[cnt], configs, num_configs);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* get the pin config settings for a specified pin group */
|
|
static int samsung_pinconf_group_get(struct pinctrl_dev *pctldev,
|
|
unsigned int group, unsigned long *config)
|
|
{
|
|
struct samsung_pinctrl_drv_data *drvdata;
|
|
const unsigned int *pins;
|
|
|
|
drvdata = pinctrl_dev_get_drvdata(pctldev);
|
|
pins = drvdata->pin_groups[group].pins;
|
|
samsung_pinconf_get(pctldev, pins[0], config);
|
|
return 0;
|
|
}
|
|
|
|
/* list of pinconfig callbacks for pinconfig vertical in the pinctrl code */
|
|
static const struct pinconf_ops samsung_pinconf_ops = {
|
|
.pin_config_get = samsung_pinconf_get,
|
|
.pin_config_set = samsung_pinconf_set,
|
|
.pin_config_group_get = samsung_pinconf_group_get,
|
|
.pin_config_group_set = samsung_pinconf_group_set,
|
|
};
|
|
|
|
/*
|
|
* The samsung_gpio_set_vlaue() should be called with "bank->slock" held
|
|
* to avoid race condition.
|
|
*/
|
|
static void samsung_gpio_set_value(struct gpio_chip *gc,
|
|
unsigned offset, int value)
|
|
{
|
|
struct samsung_pin_bank *bank = gpiochip_get_data(gc);
|
|
const struct samsung_pin_bank_type *type = bank->type;
|
|
void __iomem *reg;
|
|
u32 data;
|
|
|
|
reg = bank->pctl_base + bank->pctl_offset;
|
|
|
|
data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]);
|
|
data &= ~(1 << offset);
|
|
if (value)
|
|
data |= 1 << offset;
|
|
writel(data, reg + type->reg_offset[PINCFG_TYPE_DAT]);
|
|
}
|
|
|
|
/* gpiolib gpio_set callback function */
|
|
static void samsung_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
|
|
{
|
|
struct samsung_pin_bank *bank = gpiochip_get_data(gc);
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&bank->slock, flags);
|
|
samsung_gpio_set_value(gc, offset, value);
|
|
spin_unlock_irqrestore(&bank->slock, flags);
|
|
}
|
|
|
|
/* gpiolib gpio_get callback function */
|
|
static int samsung_gpio_get(struct gpio_chip *gc, unsigned offset)
|
|
{
|
|
void __iomem *reg;
|
|
u32 data;
|
|
struct samsung_pin_bank *bank = gpiochip_get_data(gc);
|
|
const struct samsung_pin_bank_type *type = bank->type;
|
|
|
|
reg = bank->pctl_base + bank->pctl_offset;
|
|
|
|
data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]);
|
|
data >>= offset;
|
|
data &= 1;
|
|
return data;
|
|
}
|
|
|
|
/*
|
|
* The samsung_gpio_set_direction() should be called with "bank->slock" held
|
|
* to avoid race condition.
|
|
* The calls to gpio_direction_output() and gpio_direction_input()
|
|
* leads to this function call.
|
|
*/
|
|
static int samsung_gpio_set_direction(struct gpio_chip *gc,
|
|
unsigned offset, bool input)
|
|
{
|
|
const struct samsung_pin_bank_type *type;
|
|
struct samsung_pin_bank *bank;
|
|
void __iomem *reg;
|
|
u32 data, mask, shift;
|
|
|
|
bank = gpiochip_get_data(gc);
|
|
type = bank->type;
|
|
|
|
reg = bank->pctl_base + bank->pctl_offset
|
|
+ type->reg_offset[PINCFG_TYPE_FUNC];
|
|
|
|
mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1;
|
|
shift = offset * type->fld_width[PINCFG_TYPE_FUNC];
|
|
if (shift >= 32) {
|
|
/* Some banks have two config registers */
|
|
shift -= 32;
|
|
reg += 4;
|
|
}
|
|
|
|
data = readl(reg);
|
|
data &= ~(mask << shift);
|
|
if (!input)
|
|
data |= EXYNOS_PIN_FUNC_OUTPUT << shift;
|
|
writel(data, reg);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* gpiolib gpio_direction_input callback function. */
|
|
static int samsung_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
|
|
{
|
|
struct samsung_pin_bank *bank = gpiochip_get_data(gc);
|
|
unsigned long flags;
|
|
int ret;
|
|
|
|
spin_lock_irqsave(&bank->slock, flags);
|
|
ret = samsung_gpio_set_direction(gc, offset, true);
|
|
spin_unlock_irqrestore(&bank->slock, flags);
|
|
return ret;
|
|
}
|
|
|
|
/* gpiolib gpio_direction_output callback function. */
|
|
static int samsung_gpio_direction_output(struct gpio_chip *gc, unsigned offset,
|
|
int value)
|
|
{
|
|
struct samsung_pin_bank *bank = gpiochip_get_data(gc);
|
|
unsigned long flags;
|
|
int ret;
|
|
|
|
spin_lock_irqsave(&bank->slock, flags);
|
|
samsung_gpio_set_value(gc, offset, value);
|
|
ret = samsung_gpio_set_direction(gc, offset, false);
|
|
spin_unlock_irqrestore(&bank->slock, flags);
|
|
|
|
return ret;
|
|
}
|
|
|
|
/*
|
|
* gpiolib gpio_to_irq callback function. Creates a mapping between a GPIO pin
|
|
* and a virtual IRQ, if not already present.
|
|
*/
|
|
static int samsung_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
|
|
{
|
|
struct samsung_pin_bank *bank = gpiochip_get_data(gc);
|
|
unsigned int virq;
|
|
|
|
if (!bank->irq_domain)
|
|
return -ENXIO;
|
|
|
|
virq = irq_create_mapping(bank->irq_domain, offset);
|
|
|
|
return (virq) ? : -ENXIO;
|
|
}
|
|
|
|
static struct samsung_pin_group *samsung_pinctrl_create_groups(
|
|
struct device *dev,
|
|
struct samsung_pinctrl_drv_data *drvdata,
|
|
unsigned int *cnt)
|
|
{
|
|
struct pinctrl_desc *ctrldesc = &drvdata->pctl;
|
|
struct samsung_pin_group *groups, *grp;
|
|
const struct pinctrl_pin_desc *pdesc;
|
|
int i;
|
|
|
|
groups = devm_kcalloc(dev, ctrldesc->npins, sizeof(*groups),
|
|
GFP_KERNEL);
|
|
if (!groups)
|
|
return ERR_PTR(-EINVAL);
|
|
grp = groups;
|
|
|
|
pdesc = ctrldesc->pins;
|
|
for (i = 0; i < ctrldesc->npins; ++i, ++pdesc, ++grp) {
|
|
grp->name = pdesc->name;
|
|
grp->pins = &pdesc->number;
|
|
grp->num_pins = 1;
|
|
}
|
|
|
|
*cnt = ctrldesc->npins;
|
|
return groups;
|
|
}
|
|
|
|
static int samsung_pinctrl_create_function(struct device *dev,
|
|
struct samsung_pinctrl_drv_data *drvdata,
|
|
struct device_node *func_np,
|
|
struct samsung_pmx_func *func)
|
|
{
|
|
int npins;
|
|
int ret;
|
|
int i;
|
|
|
|
if (of_property_read_u32(func_np, "samsung,pin-function", &func->val))
|
|
return 0;
|
|
|
|
npins = of_property_count_strings(func_np, "samsung,pins");
|
|
if (npins < 1) {
|
|
dev_err(dev, "invalid pin list in %pOFn node", func_np);
|
|
return -EINVAL;
|
|
}
|
|
|
|
func->name = func_np->full_name;
|
|
|
|
func->groups = devm_kcalloc(dev, npins, sizeof(char *), GFP_KERNEL);
|
|
if (!func->groups)
|
|
return -ENOMEM;
|
|
|
|
for (i = 0; i < npins; ++i) {
|
|
const char *gname;
|
|
|
|
ret = of_property_read_string_index(func_np, "samsung,pins",
|
|
i, &gname);
|
|
if (ret) {
|
|
dev_err(dev,
|
|
"failed to read pin name %d from %pOFn node\n",
|
|
i, func_np);
|
|
return ret;
|
|
}
|
|
|
|
func->groups[i] = gname;
|
|
}
|
|
|
|
func->num_groups = npins;
|
|
return 1;
|
|
}
|
|
|
|
static struct samsung_pmx_func *samsung_pinctrl_create_functions(
|
|
struct device *dev,
|
|
struct samsung_pinctrl_drv_data *drvdata,
|
|
unsigned int *cnt)
|
|
{
|
|
struct samsung_pmx_func *functions, *func;
|
|
struct device_node *dev_np = dev->of_node;
|
|
struct device_node *cfg_np;
|
|
unsigned int func_cnt = 0;
|
|
int ret;
|
|
|
|
/*
|
|
* Iterate over all the child nodes of the pin controller node
|
|
* and create pin groups and pin function lists.
|
|
*/
|
|
for_each_child_of_node(dev_np, cfg_np) {
|
|
struct device_node *func_np;
|
|
|
|
if (!of_get_child_count(cfg_np)) {
|
|
if (!of_find_property(cfg_np,
|
|
"samsung,pin-function", NULL))
|
|
continue;
|
|
++func_cnt;
|
|
continue;
|
|
}
|
|
|
|
for_each_child_of_node(cfg_np, func_np) {
|
|
if (!of_find_property(func_np,
|
|
"samsung,pin-function", NULL))
|
|
continue;
|
|
++func_cnt;
|
|
}
|
|
}
|
|
|
|
functions = devm_kcalloc(dev, func_cnt, sizeof(*functions),
|
|
GFP_KERNEL);
|
|
if (!functions)
|
|
return ERR_PTR(-ENOMEM);
|
|
func = functions;
|
|
|
|
/*
|
|
* Iterate over all the child nodes of the pin controller node
|
|
* and create pin groups and pin function lists.
|
|
*/
|
|
func_cnt = 0;
|
|
for_each_child_of_node(dev_np, cfg_np) {
|
|
struct device_node *func_np;
|
|
|
|
if (!of_get_child_count(cfg_np)) {
|
|
ret = samsung_pinctrl_create_function(dev, drvdata,
|
|
cfg_np, func);
|
|
if (ret < 0) {
|
|
of_node_put(cfg_np);
|
|
return ERR_PTR(ret);
|
|
}
|
|
if (ret > 0) {
|
|
++func;
|
|
++func_cnt;
|
|
}
|
|
continue;
|
|
}
|
|
|
|
for_each_child_of_node(cfg_np, func_np) {
|
|
ret = samsung_pinctrl_create_function(dev, drvdata,
|
|
func_np, func);
|
|
if (ret < 0) {
|
|
of_node_put(func_np);
|
|
of_node_put(cfg_np);
|
|
return ERR_PTR(ret);
|
|
}
|
|
if (ret > 0) {
|
|
++func;
|
|
++func_cnt;
|
|
}
|
|
}
|
|
}
|
|
|
|
*cnt = func_cnt;
|
|
return functions;
|
|
}
|
|
|
|
/*
|
|
* Parse the information about all the available pin groups and pin functions
|
|
* from device node of the pin-controller. A pin group is formed with all
|
|
* the pins listed in the "samsung,pins" property.
|
|
*/
|
|
|
|
static int samsung_pinctrl_parse_dt(struct platform_device *pdev,
|
|
struct samsung_pinctrl_drv_data *drvdata)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
struct samsung_pin_group *groups;
|
|
struct samsung_pmx_func *functions;
|
|
unsigned int grp_cnt = 0, func_cnt = 0;
|
|
|
|
groups = samsung_pinctrl_create_groups(dev, drvdata, &grp_cnt);
|
|
if (IS_ERR(groups)) {
|
|
dev_err(dev, "failed to parse pin groups\n");
|
|
return PTR_ERR(groups);
|
|
}
|
|
|
|
functions = samsung_pinctrl_create_functions(dev, drvdata, &func_cnt);
|
|
if (IS_ERR(functions)) {
|
|
dev_err(dev, "failed to parse pin functions\n");
|
|
return PTR_ERR(functions);
|
|
}
|
|
|
|
drvdata->pin_groups = groups;
|
|
drvdata->nr_groups = grp_cnt;
|
|
drvdata->pmx_functions = functions;
|
|
drvdata->nr_functions = func_cnt;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* register the pinctrl interface with the pinctrl subsystem */
|
|
static int samsung_pinctrl_register(struct platform_device *pdev,
|
|
struct samsung_pinctrl_drv_data *drvdata)
|
|
{
|
|
struct pinctrl_desc *ctrldesc = &drvdata->pctl;
|
|
struct pinctrl_pin_desc *pindesc, *pdesc;
|
|
struct samsung_pin_bank *pin_bank;
|
|
char *pin_names;
|
|
int pin, bank, ret;
|
|
|
|
ctrldesc->name = "samsung-pinctrl";
|
|
ctrldesc->owner = THIS_MODULE;
|
|
ctrldesc->pctlops = &samsung_pctrl_ops;
|
|
ctrldesc->pmxops = &samsung_pinmux_ops;
|
|
ctrldesc->confops = &samsung_pinconf_ops;
|
|
|
|
pindesc = devm_kcalloc(&pdev->dev,
|
|
drvdata->nr_pins, sizeof(*pindesc),
|
|
GFP_KERNEL);
|
|
if (!pindesc)
|
|
return -ENOMEM;
|
|
ctrldesc->pins = pindesc;
|
|
ctrldesc->npins = drvdata->nr_pins;
|
|
|
|
/* dynamically populate the pin number and pin name for pindesc */
|
|
for (pin = 0, pdesc = pindesc; pin < ctrldesc->npins; pin++, pdesc++)
|
|
pdesc->number = pin + drvdata->pin_base;
|
|
|
|
/*
|
|
* allocate space for storing the dynamically generated names for all
|
|
* the pins which belong to this pin-controller.
|
|
*/
|
|
pin_names = devm_kzalloc(&pdev->dev,
|
|
array3_size(sizeof(char), PIN_NAME_LENGTH,
|
|
drvdata->nr_pins),
|
|
GFP_KERNEL);
|
|
if (!pin_names)
|
|
return -ENOMEM;
|
|
|
|
/* for each pin, the name of the pin is pin-bank name + pin number */
|
|
for (bank = 0; bank < drvdata->nr_banks; bank++) {
|
|
pin_bank = &drvdata->pin_banks[bank];
|
|
for (pin = 0; pin < pin_bank->nr_pins; pin++) {
|
|
sprintf(pin_names, "%s-%d", pin_bank->name, pin);
|
|
pdesc = pindesc + pin_bank->pin_base + pin;
|
|
pdesc->name = pin_names;
|
|
pin_names += PIN_NAME_LENGTH;
|
|
}
|
|
}
|
|
|
|
ret = samsung_pinctrl_parse_dt(pdev, drvdata);
|
|
if (ret)
|
|
return ret;
|
|
|
|
drvdata->pctl_dev = devm_pinctrl_register(&pdev->dev, ctrldesc,
|
|
drvdata);
|
|
if (IS_ERR(drvdata->pctl_dev)) {
|
|
dev_err(&pdev->dev, "could not register pinctrl driver\n");
|
|
return PTR_ERR(drvdata->pctl_dev);
|
|
}
|
|
|
|
for (bank = 0; bank < drvdata->nr_banks; ++bank) {
|
|
pin_bank = &drvdata->pin_banks[bank];
|
|
pin_bank->grange.name = pin_bank->name;
|
|
pin_bank->grange.id = bank;
|
|
pin_bank->grange.pin_base = drvdata->pin_base
|
|
+ pin_bank->pin_base;
|
|
pin_bank->grange.base = pin_bank->grange.pin_base;
|
|
pin_bank->grange.npins = pin_bank->gpio_chip.ngpio;
|
|
pin_bank->grange.gc = &pin_bank->gpio_chip;
|
|
pinctrl_add_gpio_range(drvdata->pctl_dev, &pin_bank->grange);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* unregister the pinctrl interface with the pinctrl subsystem */
|
|
static int samsung_pinctrl_unregister(struct platform_device *pdev,
|
|
struct samsung_pinctrl_drv_data *drvdata)
|
|
{
|
|
struct samsung_pin_bank *bank = drvdata->pin_banks;
|
|
int i;
|
|
|
|
for (i = 0; i < drvdata->nr_banks; ++i, ++bank)
|
|
pinctrl_remove_gpio_range(drvdata->pctl_dev, &bank->grange);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct gpio_chip samsung_gpiolib_chip = {
|
|
.request = gpiochip_generic_request,
|
|
.free = gpiochip_generic_free,
|
|
.set = samsung_gpio_set,
|
|
.get = samsung_gpio_get,
|
|
.direction_input = samsung_gpio_direction_input,
|
|
.direction_output = samsung_gpio_direction_output,
|
|
.to_irq = samsung_gpio_to_irq,
|
|
.owner = THIS_MODULE,
|
|
};
|
|
|
|
/* register the gpiolib interface with the gpiolib subsystem */
|
|
static int samsung_gpiolib_register(struct platform_device *pdev,
|
|
struct samsung_pinctrl_drv_data *drvdata)
|
|
{
|
|
struct samsung_pin_bank *bank = drvdata->pin_banks;
|
|
struct gpio_chip *gc;
|
|
int ret;
|
|
int i;
|
|
|
|
for (i = 0; i < drvdata->nr_banks; ++i, ++bank) {
|
|
bank->gpio_chip = samsung_gpiolib_chip;
|
|
|
|
gc = &bank->gpio_chip;
|
|
gc->base = bank->grange.base;
|
|
gc->ngpio = bank->nr_pins;
|
|
gc->parent = &pdev->dev;
|
|
gc->of_node = bank->of_node;
|
|
gc->label = bank->name;
|
|
|
|
ret = devm_gpiochip_add_data(&pdev->dev, gc, bank);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "failed to register gpio_chip %s, error code: %d\n",
|
|
gc->label, ret);
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct samsung_pin_ctrl *
|
|
samsung_pinctrl_get_soc_data_for_of_alias(struct platform_device *pdev)
|
|
{
|
|
struct device_node *node = pdev->dev.of_node;
|
|
const struct samsung_pinctrl_of_match_data *of_data;
|
|
int id;
|
|
|
|
id = of_alias_get_id(node, "pinctrl");
|
|
if (id < 0) {
|
|
dev_err(&pdev->dev, "failed to get alias id\n");
|
|
return NULL;
|
|
}
|
|
|
|
of_data = of_device_get_match_data(&pdev->dev);
|
|
if (id >= of_data->num_ctrl) {
|
|
dev_err(&pdev->dev, "invalid alias id %d\n", id);
|
|
return NULL;
|
|
}
|
|
|
|
return &(of_data->ctrl[id]);
|
|
}
|
|
|
|
/* retrieve the soc specific data */
|
|
static const struct samsung_pin_ctrl *
|
|
samsung_pinctrl_get_soc_data(struct samsung_pinctrl_drv_data *d,
|
|
struct platform_device *pdev)
|
|
{
|
|
struct device_node *node = pdev->dev.of_node;
|
|
struct device_node *np;
|
|
const struct samsung_pin_bank_data *bdata;
|
|
const struct samsung_pin_ctrl *ctrl;
|
|
struct samsung_pin_bank *bank;
|
|
struct resource *res;
|
|
void __iomem *virt_base[SAMSUNG_PINCTRL_NUM_RESOURCES];
|
|
unsigned int i;
|
|
|
|
ctrl = samsung_pinctrl_get_soc_data_for_of_alias(pdev);
|
|
if (!ctrl)
|
|
return ERR_PTR(-ENOENT);
|
|
|
|
d->suspend = ctrl->suspend;
|
|
d->resume = ctrl->resume;
|
|
d->nr_banks = ctrl->nr_banks;
|
|
d->pin_banks = devm_kcalloc(&pdev->dev, d->nr_banks,
|
|
sizeof(*d->pin_banks), GFP_KERNEL);
|
|
if (!d->pin_banks)
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
if (ctrl->nr_ext_resources + 1 > SAMSUNG_PINCTRL_NUM_RESOURCES)
|
|
return ERR_PTR(-EINVAL);
|
|
|
|
for (i = 0; i < ctrl->nr_ext_resources + 1; i++) {
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, i);
|
|
if (!res) {
|
|
dev_err(&pdev->dev, "failed to get mem%d resource\n", i);
|
|
return ERR_PTR(-EINVAL);
|
|
}
|
|
virt_base[i] = devm_ioremap(&pdev->dev, res->start,
|
|
resource_size(res));
|
|
if (!virt_base[i]) {
|
|
dev_err(&pdev->dev, "failed to ioremap %pR\n", res);
|
|
return ERR_PTR(-EIO);
|
|
}
|
|
}
|
|
|
|
bank = d->pin_banks;
|
|
bdata = ctrl->pin_banks;
|
|
for (i = 0; i < ctrl->nr_banks; ++i, ++bdata, ++bank) {
|
|
bank->type = bdata->type;
|
|
bank->pctl_offset = bdata->pctl_offset;
|
|
bank->nr_pins = bdata->nr_pins;
|
|
bank->eint_func = bdata->eint_func;
|
|
bank->eint_type = bdata->eint_type;
|
|
bank->eint_mask = bdata->eint_mask;
|
|
bank->eint_offset = bdata->eint_offset;
|
|
bank->name = bdata->name;
|
|
|
|
spin_lock_init(&bank->slock);
|
|
bank->drvdata = d;
|
|
bank->pin_base = d->nr_pins;
|
|
d->nr_pins += bank->nr_pins;
|
|
|
|
bank->eint_base = virt_base[0];
|
|
bank->pctl_base = virt_base[bdata->pctl_res_idx];
|
|
}
|
|
/*
|
|
* Legacy platforms should provide only one resource with IO memory.
|
|
* Store it as virt_base because legacy driver needs to access it
|
|
* through samsung_pinctrl_drv_data.
|
|
*/
|
|
d->virt_base = virt_base[0];
|
|
|
|
for_each_child_of_node(node, np) {
|
|
if (!of_find_property(np, "gpio-controller", NULL))
|
|
continue;
|
|
bank = d->pin_banks;
|
|
for (i = 0; i < d->nr_banks; ++i, ++bank) {
|
|
if (of_node_name_eq(np, bank->name)) {
|
|
bank->of_node = np;
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
d->pin_base = pin_base;
|
|
pin_base += d->nr_pins;
|
|
|
|
return ctrl;
|
|
}
|
|
|
|
static int samsung_pinctrl_probe(struct platform_device *pdev)
|
|
{
|
|
struct samsung_pinctrl_drv_data *drvdata;
|
|
const struct samsung_pin_ctrl *ctrl;
|
|
struct device *dev = &pdev->dev;
|
|
struct resource *res;
|
|
int ret;
|
|
|
|
drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
|
|
if (!drvdata)
|
|
return -ENOMEM;
|
|
|
|
ctrl = samsung_pinctrl_get_soc_data(drvdata, pdev);
|
|
if (IS_ERR(ctrl)) {
|
|
dev_err(&pdev->dev, "driver data not available\n");
|
|
return PTR_ERR(ctrl);
|
|
}
|
|
drvdata->dev = dev;
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
|
|
if (res)
|
|
drvdata->irq = res->start;
|
|
|
|
if (ctrl->retention_data) {
|
|
drvdata->retention_ctrl = ctrl->retention_data->init(drvdata,
|
|
ctrl->retention_data);
|
|
if (IS_ERR(drvdata->retention_ctrl))
|
|
return PTR_ERR(drvdata->retention_ctrl);
|
|
}
|
|
|
|
ret = samsung_pinctrl_register(pdev, drvdata);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = samsung_gpiolib_register(pdev, drvdata);
|
|
if (ret) {
|
|
samsung_pinctrl_unregister(pdev, drvdata);
|
|
return ret;
|
|
}
|
|
|
|
if (ctrl->eint_gpio_init)
|
|
ctrl->eint_gpio_init(drvdata);
|
|
if (ctrl->eint_wkup_init)
|
|
ctrl->eint_wkup_init(drvdata);
|
|
|
|
platform_set_drvdata(pdev, drvdata);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* samsung_pinctrl_suspend - save pinctrl state for suspend
|
|
*
|
|
* Save data for all banks handled by this device.
|
|
*/
|
|
static int __maybe_unused samsung_pinctrl_suspend(struct device *dev)
|
|
{
|
|
struct samsung_pinctrl_drv_data *drvdata = dev_get_drvdata(dev);
|
|
int i;
|
|
|
|
for (i = 0; i < drvdata->nr_banks; i++) {
|
|
struct samsung_pin_bank *bank = &drvdata->pin_banks[i];
|
|
void __iomem *reg = bank->pctl_base + bank->pctl_offset;
|
|
const u8 *offs = bank->type->reg_offset;
|
|
const u8 *widths = bank->type->fld_width;
|
|
enum pincfg_type type;
|
|
|
|
/* Registers without a powerdown config aren't lost */
|
|
if (!widths[PINCFG_TYPE_CON_PDN])
|
|
continue;
|
|
|
|
for (type = 0; type < PINCFG_TYPE_NUM; type++)
|
|
if (widths[type])
|
|
bank->pm_save[type] = readl(reg + offs[type]);
|
|
|
|
if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) {
|
|
/* Some banks have two config registers */
|
|
bank->pm_save[PINCFG_TYPE_NUM] =
|
|
readl(reg + offs[PINCFG_TYPE_FUNC] + 4);
|
|
pr_debug("Save %s @ %p (con %#010x %08x)\n",
|
|
bank->name, reg,
|
|
bank->pm_save[PINCFG_TYPE_FUNC],
|
|
bank->pm_save[PINCFG_TYPE_NUM]);
|
|
} else {
|
|
pr_debug("Save %s @ %p (con %#010x)\n", bank->name,
|
|
reg, bank->pm_save[PINCFG_TYPE_FUNC]);
|
|
}
|
|
}
|
|
|
|
if (drvdata->suspend)
|
|
drvdata->suspend(drvdata);
|
|
if (drvdata->retention_ctrl && drvdata->retention_ctrl->enable)
|
|
drvdata->retention_ctrl->enable(drvdata);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* samsung_pinctrl_resume - restore pinctrl state from suspend
|
|
*
|
|
* Restore one of the banks that was saved during suspend.
|
|
*
|
|
* We don't bother doing anything complicated to avoid glitching lines since
|
|
* we're called before pad retention is turned off.
|
|
*/
|
|
static int __maybe_unused samsung_pinctrl_resume(struct device *dev)
|
|
{
|
|
struct samsung_pinctrl_drv_data *drvdata = dev_get_drvdata(dev);
|
|
int i;
|
|
|
|
if (drvdata->resume)
|
|
drvdata->resume(drvdata);
|
|
|
|
for (i = 0; i < drvdata->nr_banks; i++) {
|
|
struct samsung_pin_bank *bank = &drvdata->pin_banks[i];
|
|
void __iomem *reg = bank->pctl_base + bank->pctl_offset;
|
|
const u8 *offs = bank->type->reg_offset;
|
|
const u8 *widths = bank->type->fld_width;
|
|
enum pincfg_type type;
|
|
|
|
/* Registers without a powerdown config aren't lost */
|
|
if (!widths[PINCFG_TYPE_CON_PDN])
|
|
continue;
|
|
|
|
if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) {
|
|
/* Some banks have two config registers */
|
|
pr_debug("%s @ %p (con %#010x %08x => %#010x %08x)\n",
|
|
bank->name, reg,
|
|
readl(reg + offs[PINCFG_TYPE_FUNC]),
|
|
readl(reg + offs[PINCFG_TYPE_FUNC] + 4),
|
|
bank->pm_save[PINCFG_TYPE_FUNC],
|
|
bank->pm_save[PINCFG_TYPE_NUM]);
|
|
writel(bank->pm_save[PINCFG_TYPE_NUM],
|
|
reg + offs[PINCFG_TYPE_FUNC] + 4);
|
|
} else {
|
|
pr_debug("%s @ %p (con %#010x => %#010x)\n", bank->name,
|
|
reg, readl(reg + offs[PINCFG_TYPE_FUNC]),
|
|
bank->pm_save[PINCFG_TYPE_FUNC]);
|
|
}
|
|
for (type = 0; type < PINCFG_TYPE_NUM; type++)
|
|
if (widths[type])
|
|
writel(bank->pm_save[type], reg + offs[type]);
|
|
}
|
|
|
|
if (drvdata->retention_ctrl && drvdata->retention_ctrl->disable)
|
|
drvdata->retention_ctrl->disable(drvdata);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id samsung_pinctrl_dt_match[] = {
|
|
#ifdef CONFIG_PINCTRL_EXYNOS_ARM
|
|
{ .compatible = "samsung,exynos3250-pinctrl",
|
|
.data = &exynos3250_of_data },
|
|
{ .compatible = "samsung,exynos4210-pinctrl",
|
|
.data = &exynos4210_of_data },
|
|
{ .compatible = "samsung,exynos4x12-pinctrl",
|
|
.data = &exynos4x12_of_data },
|
|
{ .compatible = "samsung,exynos5250-pinctrl",
|
|
.data = &exynos5250_of_data },
|
|
{ .compatible = "samsung,exynos5260-pinctrl",
|
|
.data = &exynos5260_of_data },
|
|
{ .compatible = "samsung,exynos5410-pinctrl",
|
|
.data = &exynos5410_of_data },
|
|
{ .compatible = "samsung,exynos5420-pinctrl",
|
|
.data = &exynos5420_of_data },
|
|
{ .compatible = "samsung,s5pv210-pinctrl",
|
|
.data = &s5pv210_of_data },
|
|
#endif
|
|
#ifdef CONFIG_PINCTRL_EXYNOS_ARM64
|
|
{ .compatible = "samsung,exynos5433-pinctrl",
|
|
.data = &exynos5433_of_data },
|
|
{ .compatible = "samsung,exynos7-pinctrl",
|
|
.data = &exynos7_of_data },
|
|
#endif
|
|
#ifdef CONFIG_PINCTRL_S3C64XX
|
|
{ .compatible = "samsung,s3c64xx-pinctrl",
|
|
.data = &s3c64xx_of_data },
|
|
#endif
|
|
#ifdef CONFIG_PINCTRL_S3C24XX
|
|
{ .compatible = "samsung,s3c2412-pinctrl",
|
|
.data = &s3c2412_of_data },
|
|
{ .compatible = "samsung,s3c2416-pinctrl",
|
|
.data = &s3c2416_of_data },
|
|
{ .compatible = "samsung,s3c2440-pinctrl",
|
|
.data = &s3c2440_of_data },
|
|
{ .compatible = "samsung,s3c2450-pinctrl",
|
|
.data = &s3c2450_of_data },
|
|
#endif
|
|
{},
|
|
};
|
|
|
|
static const struct dev_pm_ops samsung_pinctrl_pm_ops = {
|
|
SET_LATE_SYSTEM_SLEEP_PM_OPS(samsung_pinctrl_suspend,
|
|
samsung_pinctrl_resume)
|
|
};
|
|
|
|
static struct platform_driver samsung_pinctrl_driver = {
|
|
.probe = samsung_pinctrl_probe,
|
|
.driver = {
|
|
.name = "samsung-pinctrl",
|
|
.of_match_table = samsung_pinctrl_dt_match,
|
|
.suppress_bind_attrs = true,
|
|
.pm = &samsung_pinctrl_pm_ops,
|
|
},
|
|
};
|
|
|
|
static int __init samsung_pinctrl_drv_register(void)
|
|
{
|
|
return platform_driver_register(&samsung_pinctrl_driver);
|
|
}
|
|
postcore_initcall(samsung_pinctrl_drv_register);
|