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![Linhua Xu](/assets/img/avatar_default.png)
For Spreadtrum pin controller, it will be the high impedance mode if disable input and output mode for a pin. Thus add PIN_CONFIG_BIAS_HIGH_IMPEDANCE configuration to support it. Signed-off-by: Linhua Xu <linhua.xu@unisoc.com> Signed-off-by: Baolin Wang <baolin.wang7@gmail.com> Link: https://lore.kernel.org/r/3bdac4c2673b54c940e511f3fa569ee33b87b8d5.1585124562.git.baolin.wang7@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
1137 lines
26 KiB
C
1137 lines
26 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Spreadtrum pin controller driver
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* Copyright (C) 2017 Spreadtrum - http://www.spreadtrum.com
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*/
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#include <linux/debugfs.h>
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/pinctrl/machine.h>
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#include <linux/pinctrl/pinconf.h>
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#include <linux/pinctrl/pinconf-generic.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinmux.h>
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#include <linux/slab.h>
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#include "../core.h"
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#include "../pinmux.h"
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#include "../pinconf.h"
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#include "../pinctrl-utils.h"
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#include "pinctrl-sprd.h"
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#define PINCTRL_BIT_MASK(width) (~(~0UL << (width)))
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#define PINCTRL_REG_OFFSET 0x20
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#define PINCTRL_REG_MISC_OFFSET 0x4020
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#define PINCTRL_REG_LEN 0x4
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#define PIN_FUNC_MASK (BIT(4) | BIT(5))
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#define PIN_FUNC_SEL_1 ~PIN_FUNC_MASK
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#define PIN_FUNC_SEL_2 BIT(4)
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#define PIN_FUNC_SEL_3 BIT(5)
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#define PIN_FUNC_SEL_4 PIN_FUNC_MASK
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#define AP_SLEEP_MODE BIT(13)
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#define PUBCP_SLEEP_MODE BIT(14)
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#define TGLDSP_SLEEP_MODE BIT(15)
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#define AGDSP_SLEEP_MODE BIT(16)
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#define CM4_SLEEP_MODE BIT(17)
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#define SLEEP_MODE_MASK GENMASK(5, 0)
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#define SLEEP_MODE_SHIFT 13
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#define SLEEP_INPUT BIT(1)
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#define SLEEP_INPUT_MASK 0x1
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#define SLEEP_INPUT_SHIFT 1
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#define SLEEP_OUTPUT BIT(0)
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#define SLEEP_OUTPUT_MASK 0x1
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#define SLEEP_OUTPUT_SHIFT 0
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#define DRIVE_STRENGTH_MASK GENMASK(3, 0)
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#define DRIVE_STRENGTH_SHIFT 19
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#define SLEEP_PULL_DOWN BIT(2)
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#define SLEEP_PULL_DOWN_MASK 0x1
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#define SLEEP_PULL_DOWN_SHIFT 2
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#define PULL_DOWN BIT(6)
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#define PULL_DOWN_MASK 0x1
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#define PULL_DOWN_SHIFT 6
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#define SLEEP_PULL_UP BIT(3)
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#define SLEEP_PULL_UP_MASK 0x1
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#define SLEEP_PULL_UP_SHIFT 3
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#define PULL_UP_20K (BIT(12) | BIT(7))
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#define PULL_UP_4_7K BIT(12)
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#define PULL_UP_MASK 0x21
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#define PULL_UP_SHIFT 7
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#define INPUT_SCHMITT BIT(11)
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#define INPUT_SCHMITT_MASK 0x1
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#define INPUT_SCHMITT_SHIFT 11
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enum pin_sleep_mode {
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AP_SLEEP = BIT(0),
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PUBCP_SLEEP = BIT(1),
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TGLDSP_SLEEP = BIT(2),
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AGDSP_SLEEP = BIT(3),
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CM4_SLEEP = BIT(4),
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};
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enum pin_func_sel {
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PIN_FUNC_1,
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PIN_FUNC_2,
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PIN_FUNC_3,
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PIN_FUNC_4,
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PIN_FUNC_MAX,
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};
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/**
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* struct sprd_pin: represent one pin's description
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* @name: pin name
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* @number: pin number
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* @type: pin type, can be GLOBAL_CTRL_PIN/COMMON_PIN/MISC_PIN
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* @reg: pin register address
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* @bit_offset: bit offset in pin register
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* @bit_width: bit width in pin register
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*/
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struct sprd_pin {
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const char *name;
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unsigned int number;
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enum pin_type type;
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unsigned long reg;
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unsigned long bit_offset;
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unsigned long bit_width;
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};
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/**
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* struct sprd_pin_group: represent one group's description
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* @name: group name
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* @npins: pin numbers of this group
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* @pins: pointer to pins array
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*/
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struct sprd_pin_group {
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const char *name;
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unsigned int npins;
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unsigned int *pins;
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};
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/**
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* struct sprd_pinctrl_soc_info: represent the SoC's pins description
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* @groups: pointer to groups of pins
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* @ngroups: group numbers of the whole SoC
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* @pins: pointer to pins description
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* @npins: pin numbers of the whole SoC
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* @grp_names: pointer to group names array
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*/
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struct sprd_pinctrl_soc_info {
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struct sprd_pin_group *groups;
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unsigned int ngroups;
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struct sprd_pin *pins;
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unsigned int npins;
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const char **grp_names;
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};
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/**
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* struct sprd_pinctrl: represent the pin controller device
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* @dev: pointer to the device structure
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* @pctl: pointer to the pinctrl handle
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* @base: base address of the controller
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* @info: pointer to SoC's pins description information
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*/
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struct sprd_pinctrl {
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struct device *dev;
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struct pinctrl_dev *pctl;
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void __iomem *base;
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struct sprd_pinctrl_soc_info *info;
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};
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#define SPRD_PIN_CONFIG_CONTROL (PIN_CONFIG_END + 1)
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#define SPRD_PIN_CONFIG_SLEEP_MODE (PIN_CONFIG_END + 2)
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static int sprd_pinctrl_get_id_by_name(struct sprd_pinctrl *sprd_pctl,
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const char *name)
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{
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struct sprd_pinctrl_soc_info *info = sprd_pctl->info;
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int i;
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for (i = 0; i < info->npins; i++) {
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if (!strcmp(info->pins[i].name, name))
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return info->pins[i].number;
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}
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return -ENODEV;
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}
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static struct sprd_pin *
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sprd_pinctrl_get_pin_by_id(struct sprd_pinctrl *sprd_pctl, unsigned int id)
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{
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struct sprd_pinctrl_soc_info *info = sprd_pctl->info;
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struct sprd_pin *pin = NULL;
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int i;
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for (i = 0; i < info->npins; i++) {
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if (info->pins[i].number == id) {
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pin = &info->pins[i];
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break;
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}
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}
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return pin;
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}
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static const struct sprd_pin_group *
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sprd_pinctrl_find_group_by_name(struct sprd_pinctrl *sprd_pctl,
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const char *name)
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{
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struct sprd_pinctrl_soc_info *info = sprd_pctl->info;
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const struct sprd_pin_group *grp = NULL;
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int i;
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for (i = 0; i < info->ngroups; i++) {
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if (!strcmp(info->groups[i].name, name)) {
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grp = &info->groups[i];
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break;
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}
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}
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return grp;
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}
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static int sprd_pctrl_group_count(struct pinctrl_dev *pctldev)
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{
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struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
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struct sprd_pinctrl_soc_info *info = pctl->info;
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return info->ngroups;
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}
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static const char *sprd_pctrl_group_name(struct pinctrl_dev *pctldev,
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unsigned int selector)
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{
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struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
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struct sprd_pinctrl_soc_info *info = pctl->info;
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return info->groups[selector].name;
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}
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static int sprd_pctrl_group_pins(struct pinctrl_dev *pctldev,
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unsigned int selector,
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const unsigned int **pins,
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unsigned int *npins)
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{
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struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
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struct sprd_pinctrl_soc_info *info = pctl->info;
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if (selector >= info->ngroups)
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return -EINVAL;
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*pins = info->groups[selector].pins;
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*npins = info->groups[selector].npins;
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return 0;
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}
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static int sprd_dt_node_to_map(struct pinctrl_dev *pctldev,
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struct device_node *np,
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struct pinctrl_map **map,
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unsigned int *num_maps)
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{
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struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
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const struct sprd_pin_group *grp;
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unsigned long *configs = NULL;
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unsigned int num_configs = 0;
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unsigned int reserved_maps = 0;
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unsigned int reserve = 0;
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const char *function;
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enum pinctrl_map_type type;
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int ret;
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grp = sprd_pinctrl_find_group_by_name(pctl, np->name);
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if (!grp) {
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dev_err(pctl->dev, "unable to find group for node %s\n",
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of_node_full_name(np));
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return -EINVAL;
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}
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ret = of_property_count_strings(np, "pins");
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if (ret < 0)
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return ret;
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if (ret == 1)
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type = PIN_MAP_TYPE_CONFIGS_PIN;
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else
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type = PIN_MAP_TYPE_CONFIGS_GROUP;
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ret = of_property_read_string(np, "function", &function);
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if (ret < 0) {
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if (ret != -EINVAL)
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dev_err(pctl->dev,
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"%s: could not parse property function\n",
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of_node_full_name(np));
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function = NULL;
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}
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ret = pinconf_generic_parse_dt_config(np, pctldev, &configs,
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&num_configs);
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if (ret < 0) {
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dev_err(pctl->dev, "%s: could not parse node property\n",
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of_node_full_name(np));
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return ret;
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}
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*map = NULL;
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*num_maps = 0;
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if (function != NULL)
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reserve++;
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if (num_configs)
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reserve++;
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ret = pinctrl_utils_reserve_map(pctldev, map, &reserved_maps,
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num_maps, reserve);
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if (ret < 0)
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goto out;
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if (function) {
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ret = pinctrl_utils_add_map_mux(pctldev, map,
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&reserved_maps, num_maps,
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grp->name, function);
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if (ret < 0)
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goto out;
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}
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if (num_configs) {
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const char *group_or_pin;
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unsigned int pin_id;
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if (type == PIN_MAP_TYPE_CONFIGS_PIN) {
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pin_id = grp->pins[0];
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group_or_pin = pin_get_name(pctldev, pin_id);
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} else {
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group_or_pin = grp->name;
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}
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ret = pinctrl_utils_add_map_configs(pctldev, map,
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&reserved_maps, num_maps,
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group_or_pin, configs,
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num_configs, type);
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}
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out:
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kfree(configs);
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return ret;
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}
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static void sprd_pctrl_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
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unsigned int offset)
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{
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seq_printf(s, "%s", dev_name(pctldev->dev));
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}
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static const struct pinctrl_ops sprd_pctrl_ops = {
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.get_groups_count = sprd_pctrl_group_count,
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.get_group_name = sprd_pctrl_group_name,
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.get_group_pins = sprd_pctrl_group_pins,
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.pin_dbg_show = sprd_pctrl_dbg_show,
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.dt_node_to_map = sprd_dt_node_to_map,
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.dt_free_map = pinctrl_utils_free_map,
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};
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static int sprd_pmx_get_function_count(struct pinctrl_dev *pctldev)
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{
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return PIN_FUNC_MAX;
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}
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static const char *sprd_pmx_get_function_name(struct pinctrl_dev *pctldev,
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unsigned int selector)
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{
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switch (selector) {
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case PIN_FUNC_1:
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return "func1";
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case PIN_FUNC_2:
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return "func2";
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case PIN_FUNC_3:
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return "func3";
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case PIN_FUNC_4:
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return "func4";
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default:
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return "null";
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}
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}
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static int sprd_pmx_get_function_groups(struct pinctrl_dev *pctldev,
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unsigned int selector,
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const char * const **groups,
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unsigned int * const num_groups)
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{
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struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
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struct sprd_pinctrl_soc_info *info = pctl->info;
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*groups = info->grp_names;
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*num_groups = info->ngroups;
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return 0;
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}
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static int sprd_pmx_set_mux(struct pinctrl_dev *pctldev,
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unsigned int func_selector,
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unsigned int group_selector)
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{
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struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
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struct sprd_pinctrl_soc_info *info = pctl->info;
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struct sprd_pin_group *grp = &info->groups[group_selector];
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unsigned int i, grp_pins = grp->npins;
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unsigned long reg;
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unsigned int val = 0;
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if (group_selector >= info->ngroups)
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return -EINVAL;
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switch (func_selector) {
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case PIN_FUNC_1:
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val &= PIN_FUNC_SEL_1;
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break;
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case PIN_FUNC_2:
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val |= PIN_FUNC_SEL_2;
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break;
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case PIN_FUNC_3:
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val |= PIN_FUNC_SEL_3;
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break;
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case PIN_FUNC_4:
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val |= PIN_FUNC_SEL_4;
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break;
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default:
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break;
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}
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for (i = 0; i < grp_pins; i++) {
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unsigned int pin_id = grp->pins[i];
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struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id);
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if (!pin || pin->type != COMMON_PIN)
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continue;
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reg = readl((void __iomem *)pin->reg);
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reg &= ~PIN_FUNC_MASK;
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reg |= val;
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writel(reg, (void __iomem *)pin->reg);
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}
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return 0;
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}
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static const struct pinmux_ops sprd_pmx_ops = {
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.get_functions_count = sprd_pmx_get_function_count,
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.get_function_name = sprd_pmx_get_function_name,
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.get_function_groups = sprd_pmx_get_function_groups,
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.set_mux = sprd_pmx_set_mux,
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};
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static int sprd_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin_id,
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unsigned long *config)
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{
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struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
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struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id);
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unsigned int param = pinconf_to_config_param(*config);
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unsigned int reg, arg;
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if (!pin)
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return -EINVAL;
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if (pin->type == GLOBAL_CTRL_PIN) {
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reg = (readl((void __iomem *)pin->reg) >>
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pin->bit_offset) & PINCTRL_BIT_MASK(pin->bit_width);
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} else {
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reg = readl((void __iomem *)pin->reg);
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}
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if (pin->type == GLOBAL_CTRL_PIN &&
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param == SPRD_PIN_CONFIG_CONTROL) {
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arg = reg;
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} else if (pin->type == COMMON_PIN || pin->type == MISC_PIN) {
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switch (param) {
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case SPRD_PIN_CONFIG_SLEEP_MODE:
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arg = (reg >> SLEEP_MODE_SHIFT) & SLEEP_MODE_MASK;
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break;
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case PIN_CONFIG_INPUT_ENABLE:
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arg = (reg >> SLEEP_INPUT_SHIFT) & SLEEP_INPUT_MASK;
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break;
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case PIN_CONFIG_OUTPUT_ENABLE:
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arg = reg & SLEEP_OUTPUT_MASK;
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break;
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case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
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if ((reg & SLEEP_OUTPUT) || (reg & SLEEP_INPUT))
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return -EINVAL;
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arg = 1;
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break;
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case PIN_CONFIG_DRIVE_STRENGTH:
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arg = (reg >> DRIVE_STRENGTH_SHIFT) &
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DRIVE_STRENGTH_MASK;
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break;
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case PIN_CONFIG_BIAS_PULL_DOWN:
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/* combine sleep pull down and pull down config */
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arg = ((reg >> SLEEP_PULL_DOWN_SHIFT) &
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SLEEP_PULL_DOWN_MASK) << 16;
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arg |= (reg >> PULL_DOWN_SHIFT) & PULL_DOWN_MASK;
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break;
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case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
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arg = (reg >> INPUT_SCHMITT_SHIFT) & INPUT_SCHMITT_MASK;
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break;
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case PIN_CONFIG_BIAS_PULL_UP:
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/* combine sleep pull up and pull up config */
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arg = ((reg >> SLEEP_PULL_UP_SHIFT) &
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SLEEP_PULL_UP_MASK) << 16;
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arg |= (reg >> PULL_UP_SHIFT) & PULL_UP_MASK;
|
|
break;
|
|
case PIN_CONFIG_BIAS_DISABLE:
|
|
if ((reg & (SLEEP_PULL_DOWN | SLEEP_PULL_UP)) ||
|
|
(reg & (PULL_DOWN | PULL_UP_4_7K | PULL_UP_20K)))
|
|
return -EINVAL;
|
|
|
|
arg = 1;
|
|
break;
|
|
case PIN_CONFIG_SLEEP_HARDWARE_STATE:
|
|
arg = 0;
|
|
break;
|
|
default:
|
|
return -ENOTSUPP;
|
|
}
|
|
} else {
|
|
return -ENOTSUPP;
|
|
}
|
|
|
|
*config = pinconf_to_config_packed(param, arg);
|
|
return 0;
|
|
}
|
|
|
|
static unsigned int sprd_pinconf_drive(unsigned int mA)
|
|
{
|
|
unsigned int val = 0;
|
|
|
|
switch (mA) {
|
|
case 2:
|
|
break;
|
|
case 4:
|
|
val |= BIT(19);
|
|
break;
|
|
case 6:
|
|
val |= BIT(20);
|
|
break;
|
|
case 8:
|
|
val |= BIT(19) | BIT(20);
|
|
break;
|
|
case 10:
|
|
val |= BIT(21);
|
|
break;
|
|
case 12:
|
|
val |= BIT(21) | BIT(19);
|
|
break;
|
|
case 14:
|
|
val |= BIT(21) | BIT(20);
|
|
break;
|
|
case 16:
|
|
val |= BIT(19) | BIT(20) | BIT(21);
|
|
break;
|
|
case 20:
|
|
val |= BIT(22);
|
|
break;
|
|
case 21:
|
|
val |= BIT(22) | BIT(19);
|
|
break;
|
|
case 24:
|
|
val |= BIT(22) | BIT(20);
|
|
break;
|
|
case 25:
|
|
val |= BIT(22) | BIT(20) | BIT(19);
|
|
break;
|
|
case 27:
|
|
val |= BIT(22) | BIT(21);
|
|
break;
|
|
case 29:
|
|
val |= BIT(22) | BIT(21) | BIT(19);
|
|
break;
|
|
case 31:
|
|
val |= BIT(22) | BIT(21) | BIT(20);
|
|
break;
|
|
case 33:
|
|
val |= BIT(22) | BIT(21) | BIT(20) | BIT(19);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
return val;
|
|
}
|
|
|
|
static bool sprd_pinctrl_check_sleep_config(unsigned long *configs,
|
|
unsigned int num_configs)
|
|
{
|
|
unsigned int param;
|
|
int i;
|
|
|
|
for (i = 0; i < num_configs; i++) {
|
|
param = pinconf_to_config_param(configs[i]);
|
|
if (param == PIN_CONFIG_SLEEP_HARDWARE_STATE)
|
|
return true;
|
|
}
|
|
|
|
return false;
|
|
}
|
|
|
|
static int sprd_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin_id,
|
|
unsigned long *configs, unsigned int num_configs)
|
|
{
|
|
struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
|
|
struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id);
|
|
bool is_sleep_config;
|
|
unsigned long reg;
|
|
int i;
|
|
|
|
if (!pin)
|
|
return -EINVAL;
|
|
|
|
is_sleep_config = sprd_pinctrl_check_sleep_config(configs, num_configs);
|
|
|
|
for (i = 0; i < num_configs; i++) {
|
|
unsigned int param, arg, shift, mask, val;
|
|
|
|
param = pinconf_to_config_param(configs[i]);
|
|
arg = pinconf_to_config_argument(configs[i]);
|
|
|
|
val = 0;
|
|
shift = 0;
|
|
mask = 0;
|
|
if (pin->type == GLOBAL_CTRL_PIN &&
|
|
param == SPRD_PIN_CONFIG_CONTROL) {
|
|
val = arg;
|
|
} else if (pin->type == COMMON_PIN || pin->type == MISC_PIN) {
|
|
switch (param) {
|
|
case SPRD_PIN_CONFIG_SLEEP_MODE:
|
|
if (arg & AP_SLEEP)
|
|
val |= AP_SLEEP_MODE;
|
|
if (arg & PUBCP_SLEEP)
|
|
val |= PUBCP_SLEEP_MODE;
|
|
if (arg & TGLDSP_SLEEP)
|
|
val |= TGLDSP_SLEEP_MODE;
|
|
if (arg & AGDSP_SLEEP)
|
|
val |= AGDSP_SLEEP_MODE;
|
|
if (arg & CM4_SLEEP)
|
|
val |= CM4_SLEEP_MODE;
|
|
|
|
mask = SLEEP_MODE_MASK;
|
|
shift = SLEEP_MODE_SHIFT;
|
|
break;
|
|
case PIN_CONFIG_INPUT_ENABLE:
|
|
if (is_sleep_config == true) {
|
|
if (arg > 0)
|
|
val |= SLEEP_INPUT;
|
|
else
|
|
val &= ~SLEEP_INPUT;
|
|
|
|
mask = SLEEP_INPUT_MASK;
|
|
shift = SLEEP_INPUT_SHIFT;
|
|
}
|
|
break;
|
|
case PIN_CONFIG_OUTPUT_ENABLE:
|
|
if (is_sleep_config == true) {
|
|
if (arg > 0)
|
|
val |= SLEEP_OUTPUT;
|
|
else
|
|
val &= ~SLEEP_OUTPUT;
|
|
|
|
mask = SLEEP_OUTPUT_MASK;
|
|
shift = SLEEP_OUTPUT_SHIFT;
|
|
}
|
|
break;
|
|
case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
|
|
if (is_sleep_config == true) {
|
|
val = shift = 0;
|
|
mask = SLEEP_OUTPUT | SLEEP_INPUT;
|
|
}
|
|
break;
|
|
case PIN_CONFIG_DRIVE_STRENGTH:
|
|
if (arg < 2 || arg > 60)
|
|
return -EINVAL;
|
|
|
|
val = sprd_pinconf_drive(arg);
|
|
mask = DRIVE_STRENGTH_MASK;
|
|
shift = DRIVE_STRENGTH_SHIFT;
|
|
break;
|
|
case PIN_CONFIG_BIAS_PULL_DOWN:
|
|
if (is_sleep_config == true) {
|
|
val |= SLEEP_PULL_DOWN;
|
|
mask = SLEEP_PULL_DOWN_MASK;
|
|
shift = SLEEP_PULL_DOWN_SHIFT;
|
|
} else {
|
|
val |= PULL_DOWN;
|
|
mask = PULL_DOWN_MASK;
|
|
shift = PULL_DOWN_SHIFT;
|
|
}
|
|
break;
|
|
case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
|
|
if (arg > 0)
|
|
val |= INPUT_SCHMITT;
|
|
else
|
|
val &= ~INPUT_SCHMITT;
|
|
|
|
mask = INPUT_SCHMITT_MASK;
|
|
shift = INPUT_SCHMITT_SHIFT;
|
|
break;
|
|
case PIN_CONFIG_BIAS_PULL_UP:
|
|
if (is_sleep_config == true) {
|
|
val |= SLEEP_PULL_UP;
|
|
mask = SLEEP_PULL_UP_MASK;
|
|
shift = SLEEP_PULL_UP_SHIFT;
|
|
} else {
|
|
if (arg == 20000)
|
|
val |= PULL_UP_20K;
|
|
else if (arg == 4700)
|
|
val |= PULL_UP_4_7K;
|
|
|
|
mask = PULL_UP_MASK;
|
|
shift = PULL_UP_SHIFT;
|
|
}
|
|
break;
|
|
case PIN_CONFIG_BIAS_DISABLE:
|
|
if (is_sleep_config == true) {
|
|
val = shift = 0;
|
|
mask = SLEEP_PULL_DOWN | SLEEP_PULL_UP;
|
|
} else {
|
|
val = shift = 0;
|
|
mask = PULL_DOWN | PULL_UP_20K |
|
|
PULL_UP_4_7K;
|
|
}
|
|
break;
|
|
case PIN_CONFIG_SLEEP_HARDWARE_STATE:
|
|
continue;
|
|
default:
|
|
return -ENOTSUPP;
|
|
}
|
|
} else {
|
|
return -ENOTSUPP;
|
|
}
|
|
|
|
if (pin->type == GLOBAL_CTRL_PIN) {
|
|
reg = readl((void __iomem *)pin->reg);
|
|
reg &= ~(PINCTRL_BIT_MASK(pin->bit_width)
|
|
<< pin->bit_offset);
|
|
reg |= (val & PINCTRL_BIT_MASK(pin->bit_width))
|
|
<< pin->bit_offset;
|
|
writel(reg, (void __iomem *)pin->reg);
|
|
} else {
|
|
reg = readl((void __iomem *)pin->reg);
|
|
reg &= ~(mask << shift);
|
|
reg |= val;
|
|
writel(reg, (void __iomem *)pin->reg);
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int sprd_pinconf_group_get(struct pinctrl_dev *pctldev,
|
|
unsigned int selector, unsigned long *config)
|
|
{
|
|
struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
|
|
struct sprd_pinctrl_soc_info *info = pctl->info;
|
|
struct sprd_pin_group *grp;
|
|
unsigned int pin_id;
|
|
|
|
if (selector >= info->ngroups)
|
|
return -EINVAL;
|
|
|
|
grp = &info->groups[selector];
|
|
pin_id = grp->pins[0];
|
|
|
|
return sprd_pinconf_get(pctldev, pin_id, config);
|
|
}
|
|
|
|
static int sprd_pinconf_group_set(struct pinctrl_dev *pctldev,
|
|
unsigned int selector,
|
|
unsigned long *configs,
|
|
unsigned int num_configs)
|
|
{
|
|
struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
|
|
struct sprd_pinctrl_soc_info *info = pctl->info;
|
|
struct sprd_pin_group *grp;
|
|
int ret, i;
|
|
|
|
if (selector >= info->ngroups)
|
|
return -EINVAL;
|
|
|
|
grp = &info->groups[selector];
|
|
|
|
for (i = 0; i < grp->npins; i++) {
|
|
unsigned int pin_id = grp->pins[i];
|
|
|
|
ret = sprd_pinconf_set(pctldev, pin_id, configs, num_configs);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int sprd_pinconf_get_config(struct pinctrl_dev *pctldev,
|
|
unsigned int pin_id,
|
|
unsigned long *config)
|
|
{
|
|
struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
|
|
struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id);
|
|
|
|
if (!pin)
|
|
return -EINVAL;
|
|
|
|
if (pin->type == GLOBAL_CTRL_PIN) {
|
|
*config = (readl((void __iomem *)pin->reg) >>
|
|
pin->bit_offset) & PINCTRL_BIT_MASK(pin->bit_width);
|
|
} else {
|
|
*config = readl((void __iomem *)pin->reg);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void sprd_pinconf_dbg_show(struct pinctrl_dev *pctldev,
|
|
struct seq_file *s, unsigned int pin_id)
|
|
{
|
|
unsigned long config;
|
|
int ret;
|
|
|
|
ret = sprd_pinconf_get_config(pctldev, pin_id, &config);
|
|
if (ret)
|
|
return;
|
|
|
|
seq_printf(s, "0x%lx", config);
|
|
}
|
|
|
|
static void sprd_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
|
|
struct seq_file *s,
|
|
unsigned int selector)
|
|
{
|
|
struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
|
|
struct sprd_pinctrl_soc_info *info = pctl->info;
|
|
struct sprd_pin_group *grp;
|
|
unsigned long config;
|
|
const char *name;
|
|
int i, ret;
|
|
|
|
if (selector >= info->ngroups)
|
|
return;
|
|
|
|
grp = &info->groups[selector];
|
|
|
|
seq_putc(s, '\n');
|
|
for (i = 0; i < grp->npins; i++, config++) {
|
|
unsigned int pin_id = grp->pins[i];
|
|
|
|
name = pin_get_name(pctldev, pin_id);
|
|
ret = sprd_pinconf_get_config(pctldev, pin_id, &config);
|
|
if (ret)
|
|
return;
|
|
|
|
seq_printf(s, "%s: 0x%lx ", name, config);
|
|
}
|
|
}
|
|
|
|
static const struct pinconf_ops sprd_pinconf_ops = {
|
|
.is_generic = true,
|
|
.pin_config_get = sprd_pinconf_get,
|
|
.pin_config_set = sprd_pinconf_set,
|
|
.pin_config_group_get = sprd_pinconf_group_get,
|
|
.pin_config_group_set = sprd_pinconf_group_set,
|
|
.pin_config_dbg_show = sprd_pinconf_dbg_show,
|
|
.pin_config_group_dbg_show = sprd_pinconf_group_dbg_show,
|
|
};
|
|
|
|
static const struct pinconf_generic_params sprd_dt_params[] = {
|
|
{"sprd,control", SPRD_PIN_CONFIG_CONTROL, 0},
|
|
{"sprd,sleep-mode", SPRD_PIN_CONFIG_SLEEP_MODE, 0},
|
|
};
|
|
|
|
#ifdef CONFIG_DEBUG_FS
|
|
static const struct pin_config_item sprd_conf_items[] = {
|
|
PCONFDUMP(SPRD_PIN_CONFIG_CONTROL, "global control", NULL, true),
|
|
PCONFDUMP(SPRD_PIN_CONFIG_SLEEP_MODE, "sleep mode", NULL, true),
|
|
};
|
|
#endif
|
|
|
|
static struct pinctrl_desc sprd_pinctrl_desc = {
|
|
.pctlops = &sprd_pctrl_ops,
|
|
.pmxops = &sprd_pmx_ops,
|
|
.confops = &sprd_pinconf_ops,
|
|
.num_custom_params = ARRAY_SIZE(sprd_dt_params),
|
|
.custom_params = sprd_dt_params,
|
|
#ifdef CONFIG_DEBUG_FS
|
|
.custom_conf_items = sprd_conf_items,
|
|
#endif
|
|
.owner = THIS_MODULE,
|
|
};
|
|
|
|
static int sprd_pinctrl_parse_groups(struct device_node *np,
|
|
struct sprd_pinctrl *sprd_pctl,
|
|
struct sprd_pin_group *grp)
|
|
{
|
|
struct property *prop;
|
|
const char *pin_name;
|
|
int ret, i = 0;
|
|
|
|
ret = of_property_count_strings(np, "pins");
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
grp->name = np->name;
|
|
grp->npins = ret;
|
|
grp->pins = devm_kcalloc(sprd_pctl->dev,
|
|
grp->npins, sizeof(unsigned int),
|
|
GFP_KERNEL);
|
|
if (!grp->pins)
|
|
return -ENOMEM;
|
|
|
|
of_property_for_each_string(np, "pins", prop, pin_name) {
|
|
ret = sprd_pinctrl_get_id_by_name(sprd_pctl, pin_name);
|
|
if (ret >= 0)
|
|
grp->pins[i++] = ret;
|
|
}
|
|
|
|
for (i = 0; i < grp->npins; i++) {
|
|
dev_dbg(sprd_pctl->dev,
|
|
"Group[%s] contains [%d] pins: id = %d\n",
|
|
grp->name, grp->npins, grp->pins[i]);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static unsigned int sprd_pinctrl_get_groups(struct device_node *np)
|
|
{
|
|
struct device_node *child;
|
|
unsigned int group_cnt, cnt;
|
|
|
|
group_cnt = of_get_child_count(np);
|
|
|
|
for_each_child_of_node(np, child) {
|
|
cnt = of_get_child_count(child);
|
|
if (cnt > 0)
|
|
group_cnt += cnt;
|
|
}
|
|
|
|
return group_cnt;
|
|
}
|
|
|
|
static int sprd_pinctrl_parse_dt(struct sprd_pinctrl *sprd_pctl)
|
|
{
|
|
struct sprd_pinctrl_soc_info *info = sprd_pctl->info;
|
|
struct device_node *np = sprd_pctl->dev->of_node;
|
|
struct device_node *child, *sub_child;
|
|
struct sprd_pin_group *grp;
|
|
const char **temp;
|
|
int ret;
|
|
|
|
if (!np)
|
|
return -ENODEV;
|
|
|
|
info->ngroups = sprd_pinctrl_get_groups(np);
|
|
if (!info->ngroups)
|
|
return 0;
|
|
|
|
info->groups = devm_kcalloc(sprd_pctl->dev,
|
|
info->ngroups,
|
|
sizeof(struct sprd_pin_group),
|
|
GFP_KERNEL);
|
|
if (!info->groups)
|
|
return -ENOMEM;
|
|
|
|
info->grp_names = devm_kcalloc(sprd_pctl->dev,
|
|
info->ngroups, sizeof(char *),
|
|
GFP_KERNEL);
|
|
if (!info->grp_names)
|
|
return -ENOMEM;
|
|
|
|
temp = info->grp_names;
|
|
grp = info->groups;
|
|
|
|
for_each_child_of_node(np, child) {
|
|
ret = sprd_pinctrl_parse_groups(child, sprd_pctl, grp);
|
|
if (ret) {
|
|
of_node_put(child);
|
|
return ret;
|
|
}
|
|
|
|
*temp++ = grp->name;
|
|
grp++;
|
|
|
|
if (of_get_child_count(child) > 0) {
|
|
for_each_child_of_node(child, sub_child) {
|
|
ret = sprd_pinctrl_parse_groups(sub_child,
|
|
sprd_pctl, grp);
|
|
if (ret) {
|
|
of_node_put(sub_child);
|
|
of_node_put(child);
|
|
return ret;
|
|
}
|
|
|
|
*temp++ = grp->name;
|
|
grp++;
|
|
}
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int sprd_pinctrl_add_pins(struct sprd_pinctrl *sprd_pctl,
|
|
struct sprd_pins_info *sprd_soc_pin_info,
|
|
int pins_cnt)
|
|
{
|
|
struct sprd_pinctrl_soc_info *info = sprd_pctl->info;
|
|
unsigned int ctrl_pin = 0, com_pin = 0;
|
|
struct sprd_pin *pin;
|
|
int i;
|
|
|
|
info->npins = pins_cnt;
|
|
info->pins = devm_kcalloc(sprd_pctl->dev,
|
|
info->npins, sizeof(struct sprd_pin),
|
|
GFP_KERNEL);
|
|
if (!info->pins)
|
|
return -ENOMEM;
|
|
|
|
for (i = 0, pin = info->pins; i < info->npins; i++, pin++) {
|
|
unsigned int reg;
|
|
|
|
pin->name = sprd_soc_pin_info[i].name;
|
|
pin->type = sprd_soc_pin_info[i].type;
|
|
pin->number = sprd_soc_pin_info[i].num;
|
|
reg = sprd_soc_pin_info[i].reg;
|
|
if (pin->type == GLOBAL_CTRL_PIN) {
|
|
pin->reg = (unsigned long)sprd_pctl->base +
|
|
PINCTRL_REG_LEN * reg;
|
|
pin->bit_offset = sprd_soc_pin_info[i].bit_offset;
|
|
pin->bit_width = sprd_soc_pin_info[i].bit_width;
|
|
ctrl_pin++;
|
|
} else if (pin->type == COMMON_PIN) {
|
|
pin->reg = (unsigned long)sprd_pctl->base +
|
|
PINCTRL_REG_OFFSET + PINCTRL_REG_LEN *
|
|
(i - ctrl_pin);
|
|
com_pin++;
|
|
} else if (pin->type == MISC_PIN) {
|
|
pin->reg = (unsigned long)sprd_pctl->base +
|
|
PINCTRL_REG_MISC_OFFSET + PINCTRL_REG_LEN *
|
|
(i - ctrl_pin - com_pin);
|
|
}
|
|
}
|
|
|
|
for (i = 0, pin = info->pins; i < info->npins; pin++, i++) {
|
|
dev_dbg(sprd_pctl->dev, "pin name[%s-%d], type = %d, "
|
|
"bit offset = %ld, bit width = %ld, reg = 0x%lx\n",
|
|
pin->name, pin->number, pin->type,
|
|
pin->bit_offset, pin->bit_width, pin->reg);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int sprd_pinctrl_core_probe(struct platform_device *pdev,
|
|
struct sprd_pins_info *sprd_soc_pin_info,
|
|
int pins_cnt)
|
|
{
|
|
struct sprd_pinctrl *sprd_pctl;
|
|
struct sprd_pinctrl_soc_info *pinctrl_info;
|
|
struct pinctrl_pin_desc *pin_desc;
|
|
int ret, i;
|
|
|
|
sprd_pctl = devm_kzalloc(&pdev->dev, sizeof(struct sprd_pinctrl),
|
|
GFP_KERNEL);
|
|
if (!sprd_pctl)
|
|
return -ENOMEM;
|
|
|
|
sprd_pctl->base = devm_platform_ioremap_resource(pdev, 0);
|
|
if (IS_ERR(sprd_pctl->base))
|
|
return PTR_ERR(sprd_pctl->base);
|
|
|
|
pinctrl_info = devm_kzalloc(&pdev->dev,
|
|
sizeof(struct sprd_pinctrl_soc_info),
|
|
GFP_KERNEL);
|
|
if (!pinctrl_info)
|
|
return -ENOMEM;
|
|
|
|
sprd_pctl->info = pinctrl_info;
|
|
sprd_pctl->dev = &pdev->dev;
|
|
platform_set_drvdata(pdev, sprd_pctl);
|
|
|
|
ret = sprd_pinctrl_add_pins(sprd_pctl, sprd_soc_pin_info, pins_cnt);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "fail to add pins information\n");
|
|
return ret;
|
|
}
|
|
|
|
ret = sprd_pinctrl_parse_dt(sprd_pctl);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "fail to parse dt properties\n");
|
|
return ret;
|
|
}
|
|
|
|
pin_desc = devm_kcalloc(&pdev->dev,
|
|
pinctrl_info->npins,
|
|
sizeof(struct pinctrl_pin_desc),
|
|
GFP_KERNEL);
|
|
if (!pin_desc)
|
|
return -ENOMEM;
|
|
|
|
for (i = 0; i < pinctrl_info->npins; i++) {
|
|
pin_desc[i].number = pinctrl_info->pins[i].number;
|
|
pin_desc[i].name = pinctrl_info->pins[i].name;
|
|
pin_desc[i].drv_data = pinctrl_info;
|
|
}
|
|
|
|
sprd_pinctrl_desc.pins = pin_desc;
|
|
sprd_pinctrl_desc.name = dev_name(&pdev->dev);
|
|
sprd_pinctrl_desc.npins = pinctrl_info->npins;
|
|
|
|
sprd_pctl->pctl = pinctrl_register(&sprd_pinctrl_desc,
|
|
&pdev->dev, (void *)sprd_pctl);
|
|
if (IS_ERR(sprd_pctl->pctl)) {
|
|
dev_err(&pdev->dev, "could not register pinctrl driver\n");
|
|
return PTR_ERR(sprd_pctl->pctl);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(sprd_pinctrl_core_probe);
|
|
|
|
int sprd_pinctrl_remove(struct platform_device *pdev)
|
|
{
|
|
struct sprd_pinctrl *sprd_pctl = platform_get_drvdata(pdev);
|
|
|
|
pinctrl_unregister(sprd_pctl->pctl);
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(sprd_pinctrl_remove);
|
|
|
|
void sprd_pinctrl_shutdown(struct platform_device *pdev)
|
|
{
|
|
struct pinctrl *pinctl;
|
|
struct pinctrl_state *state;
|
|
|
|
pinctl = devm_pinctrl_get(&pdev->dev);
|
|
if (IS_ERR(pinctl))
|
|
return;
|
|
state = pinctrl_lookup_state(pinctl, "shutdown");
|
|
if (IS_ERR(state))
|
|
return;
|
|
pinctrl_select_state(pinctl, state);
|
|
}
|
|
EXPORT_SYMBOL_GPL(sprd_pinctrl_shutdown);
|
|
|
|
MODULE_DESCRIPTION("SPREADTRUM Pin Controller Driver");
|
|
MODULE_AUTHOR("Baolin Wang <baolin.wang@spreadtrum.com>");
|
|
MODULE_LICENSE("GPL v2");
|