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fe42cc30a9
Add #reset-cells and update mtk-wdt.txt Signed-off-by: yong.liang <yong.liang@mediatek.com> Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com> Reviewed-by: Yingjoe Chen <yingjoe.chen@mediatek.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Guenter Roeck <groeck7@gmail.com> Link: https://lore.kernel.org/r/20200115085828.27791-3-yong.liang@mediatek.com Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
22 lines
670 B
C
22 lines
670 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 MediaTek Inc.
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* Author: Yong Liang <yong.liang@mediatek.com>
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*/
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#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT2712
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#define _DT_BINDINGS_RESET_CONTROLLER_MT2712
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#define MT2712_TOPRGU_INFRA_SW_RST 0
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#define MT2712_TOPRGU_MM_SW_RST 1
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#define MT2712_TOPRGU_MFG_SW_RST 2
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#define MT2712_TOPRGU_VENC_SW_RST 3
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#define MT2712_TOPRGU_VDEC_SW_RST 4
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#define MT2712_TOPRGU_IMG_SW_RST 5
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#define MT2712_TOPRGU_INFRA_AO_SW_RST 8
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#define MT2712_TOPRGU_USB_SW_RST 9
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#define MT2712_TOPRGU_APMIXED_SW_RST 10
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#define MT2712_TOPRGU_SW_RST_NUM 11
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#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT2712 */
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