Shenming Lu 57e3cebd02 KVM: arm64: Delay the polling of the GICR_VPENDBASER.Dirty bit ... In order to reduce the impact of the VPT parsing happening on the GIC, we can split the vcpu reseidency in two phases: - programming GICR_VPENDBASER: this still happens in vcpu_load() - checking for the VPT parsing to be complete: this can happen on vcpu entry (in kvm_vgic_flush_hwstate()) This allows the GIC and the CPU to work in parallel, rewmoving some of the entry overhead. Suggested-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Shenming Lu <lushenming@huawei.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20201128141857.983-3-lushenming@huawei.com		2020-11-30 11:18:29 +00:00
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arm-gic-common.h	irqchip/gic-v4.1: Advertise support v4.1 to KVM	2020-03-20 17:48:38 +00:00
arm-gic-v3.h	irqchip/gic-v3: Remove unused register definition	2020-07-27 08:55:03 +01:00
arm-gic-v4.h	KVM: arm64: Delay the polling of the GICR_VPENDBASER.Dirty bit	2020-11-30 11:18:29 +00:00
arm-gic.h
arm-vic.h	irqchip/vic: Cut down the external API	2020-06-27 11:54:54 +01:00
chained_irq.h
irq-bcm2836.h	irqchip: irq-bcm2836.h: drop a duplicated word	2020-07-27 08:55:03 +01:00
irq-davinci-aintc.h
irq-davinci-cp-intc.h
irq-ixp4xx.h
irq-madera.h
irq-omap-intc.h	include/: replace HTTP links with HTTPS ones	2020-08-12 10:57:59 -07:00
irq-partition-percpu.h	irqchip: Add include guard to irq-partition-percpu.h	2019-08-20 10:35:46 +01:00
irq-sa11x0.h
mmp.h
mxs.h
versatile-fpga.h
xtensa-mx.h
xtensa-pic.h