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![Bjorn Helgaas](/assets/img/avatar_default.png)
Print swiotlb info in a style consistent with the %pR style used elsewhere in the kernel. For example: -Placing 64MB software IO TLB between ffff88007a662000 - ffff88007e662000 -software IO TLB at phys 0x7a662000 - 0x7e662000 +software IO TLB [mem 0x7a662000-0x7e661fff] (64MB) mapped at [ffff88007a662000-ffff88007e661fff] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
928 lines
26 KiB
C
928 lines
26 KiB
C
/*
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* Dynamic DMA mapping support.
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*
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* This implementation is a fallback for platforms that do not support
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* I/O TLBs (aka DMA address translation hardware).
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* Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
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* Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
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* Copyright (C) 2000, 2003 Hewlett-Packard Co
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* David Mosberger-Tang <davidm@hpl.hp.com>
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*
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* 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
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* 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
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* unnecessary i-cache flushing.
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* 04/07/.. ak Better overflow handling. Assorted fixes.
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* 05/09/10 linville Add support for syncing ranges, support syncing for
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* DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
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* 08/12/11 beckyb Add highmem support
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*/
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#include <linux/cache.h>
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#include <linux/dma-mapping.h>
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#include <linux/mm.h>
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#include <linux/export.h>
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#include <linux/spinlock.h>
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#include <linux/string.h>
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#include <linux/swiotlb.h>
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#include <linux/pfn.h>
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#include <linux/types.h>
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#include <linux/ctype.h>
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#include <linux/highmem.h>
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#include <linux/gfp.h>
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#include <asm/io.h>
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#include <asm/dma.h>
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#include <asm/scatterlist.h>
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#include <linux/init.h>
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#include <linux/bootmem.h>
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#include <linux/iommu-helper.h>
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#define OFFSET(val,align) ((unsigned long) \
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( (val) & ( (align) - 1)))
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#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
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/*
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* Minimum IO TLB size to bother booting with. Systems with mainly
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* 64bit capable cards will only lightly use the swiotlb. If we can't
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* allocate a contiguous 1MB, we're probably in trouble anyway.
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*/
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#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
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int swiotlb_force;
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/*
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* Used to do a quick range check in swiotlb_tbl_unmap_single and
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* swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
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* API.
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*/
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static char *io_tlb_start, *io_tlb_end;
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/*
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* The number of IO TLB blocks (in groups of 64) between io_tlb_start and
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* io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
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*/
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static unsigned long io_tlb_nslabs;
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/*
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* When the IOMMU overflows we return a fallback buffer. This sets the size.
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*/
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static unsigned long io_tlb_overflow = 32*1024;
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static void *io_tlb_overflow_buffer;
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/*
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* This is a free list describing the number of free entries available from
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* each index
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*/
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static unsigned int *io_tlb_list;
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static unsigned int io_tlb_index;
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/*
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* We need to save away the original address corresponding to a mapped entry
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* for the sync operations.
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*/
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static phys_addr_t *io_tlb_orig_addr;
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/*
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* Protect the above data structures in the map and unmap calls
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*/
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static DEFINE_SPINLOCK(io_tlb_lock);
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static int late_alloc;
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static int __init
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setup_io_tlb_npages(char *str)
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{
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if (isdigit(*str)) {
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io_tlb_nslabs = simple_strtoul(str, &str, 0);
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/* avoid tail segment of size < IO_TLB_SEGSIZE */
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io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
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}
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if (*str == ',')
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++str;
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if (!strcmp(str, "force"))
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swiotlb_force = 1;
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return 1;
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}
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__setup("swiotlb=", setup_io_tlb_npages);
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/* make io_tlb_overflow tunable too? */
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unsigned long swiotlb_nr_tbl(void)
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{
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return io_tlb_nslabs;
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}
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EXPORT_SYMBOL_GPL(swiotlb_nr_tbl);
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/* Note that this doesn't work with highmem page */
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static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
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volatile void *address)
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{
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return phys_to_dma(hwdev, virt_to_phys(address));
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}
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void swiotlb_print_info(void)
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{
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unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
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phys_addr_t pstart, pend;
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pstart = virt_to_phys(io_tlb_start);
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pend = virt_to_phys(io_tlb_end);
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printk(KERN_INFO "software IO TLB [mem %#010llx-%#010llx] (%luMB) mapped at [%p-%p]\n",
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(unsigned long long)pstart, (unsigned long long)pend - 1,
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bytes >> 20, io_tlb_start, io_tlb_end - 1);
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}
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void __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
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{
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unsigned long i, bytes;
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bytes = nslabs << IO_TLB_SHIFT;
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io_tlb_nslabs = nslabs;
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io_tlb_start = tlb;
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io_tlb_end = io_tlb_start + bytes;
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/*
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* Allocate and initialize the free list array. This array is used
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* to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
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* between io_tlb_start and io_tlb_end.
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*/
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io_tlb_list = alloc_bootmem_pages(PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
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for (i = 0; i < io_tlb_nslabs; i++)
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io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
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io_tlb_index = 0;
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io_tlb_orig_addr = alloc_bootmem_pages(PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
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/*
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* Get the overflow emergency buffer
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*/
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io_tlb_overflow_buffer = alloc_bootmem_low_pages(PAGE_ALIGN(io_tlb_overflow));
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if (!io_tlb_overflow_buffer)
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panic("Cannot allocate SWIOTLB overflow buffer!\n");
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if (verbose)
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swiotlb_print_info();
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}
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/*
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* Statically reserve bounce buffer space and initialize bounce buffer data
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* structures for the software IO TLB used to implement the DMA API.
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*/
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void __init
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swiotlb_init_with_default_size(size_t default_size, int verbose)
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{
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unsigned long bytes;
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if (!io_tlb_nslabs) {
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io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
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io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
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}
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bytes = io_tlb_nslabs << IO_TLB_SHIFT;
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/*
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* Get IO TLB memory from the low pages
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*/
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io_tlb_start = alloc_bootmem_low_pages(PAGE_ALIGN(bytes));
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if (!io_tlb_start)
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panic("Cannot allocate SWIOTLB buffer");
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swiotlb_init_with_tbl(io_tlb_start, io_tlb_nslabs, verbose);
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}
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void __init
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swiotlb_init(int verbose)
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{
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swiotlb_init_with_default_size(64 * (1<<20), verbose); /* default to 64MB */
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}
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/*
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* Systems with larger DMA zones (those that don't support ISA) can
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* initialize the swiotlb later using the slab allocator if needed.
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* This should be just like above, but with some error catching.
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*/
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int
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swiotlb_late_init_with_default_size(size_t default_size)
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{
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unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
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unsigned int order;
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if (!io_tlb_nslabs) {
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io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
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io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
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}
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/*
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* Get IO TLB memory from the low pages
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*/
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order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
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io_tlb_nslabs = SLABS_PER_PAGE << order;
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bytes = io_tlb_nslabs << IO_TLB_SHIFT;
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while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
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io_tlb_start = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
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order);
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if (io_tlb_start)
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break;
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order--;
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}
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if (!io_tlb_start)
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goto cleanup1;
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if (order != get_order(bytes)) {
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printk(KERN_WARNING "Warning: only able to allocate %ld MB "
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"for software IO TLB\n", (PAGE_SIZE << order) >> 20);
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io_tlb_nslabs = SLABS_PER_PAGE << order;
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bytes = io_tlb_nslabs << IO_TLB_SHIFT;
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}
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io_tlb_end = io_tlb_start + bytes;
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memset(io_tlb_start, 0, bytes);
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/*
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* Allocate and initialize the free list array. This array is used
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* to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
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* between io_tlb_start and io_tlb_end.
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*/
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io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
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get_order(io_tlb_nslabs * sizeof(int)));
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if (!io_tlb_list)
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goto cleanup2;
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for (i = 0; i < io_tlb_nslabs; i++)
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io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
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io_tlb_index = 0;
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io_tlb_orig_addr = (phys_addr_t *)
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__get_free_pages(GFP_KERNEL,
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get_order(io_tlb_nslabs *
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sizeof(phys_addr_t)));
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if (!io_tlb_orig_addr)
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goto cleanup3;
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memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t));
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/*
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* Get the overflow emergency buffer
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*/
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io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
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get_order(io_tlb_overflow));
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if (!io_tlb_overflow_buffer)
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goto cleanup4;
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swiotlb_print_info();
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late_alloc = 1;
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return 0;
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cleanup4:
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free_pages((unsigned long)io_tlb_orig_addr,
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get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
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io_tlb_orig_addr = NULL;
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cleanup3:
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free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
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sizeof(int)));
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io_tlb_list = NULL;
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cleanup2:
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io_tlb_end = NULL;
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free_pages((unsigned long)io_tlb_start, order);
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io_tlb_start = NULL;
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cleanup1:
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io_tlb_nslabs = req_nslabs;
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return -ENOMEM;
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}
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void __init swiotlb_free(void)
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{
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if (!io_tlb_overflow_buffer)
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return;
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if (late_alloc) {
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free_pages((unsigned long)io_tlb_overflow_buffer,
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get_order(io_tlb_overflow));
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free_pages((unsigned long)io_tlb_orig_addr,
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get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
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free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
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sizeof(int)));
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free_pages((unsigned long)io_tlb_start,
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get_order(io_tlb_nslabs << IO_TLB_SHIFT));
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} else {
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free_bootmem_late(__pa(io_tlb_overflow_buffer),
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PAGE_ALIGN(io_tlb_overflow));
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free_bootmem_late(__pa(io_tlb_orig_addr),
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PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
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free_bootmem_late(__pa(io_tlb_list),
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PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
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free_bootmem_late(__pa(io_tlb_start),
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PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
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}
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io_tlb_nslabs = 0;
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}
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static int is_swiotlb_buffer(phys_addr_t paddr)
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{
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return paddr >= virt_to_phys(io_tlb_start) &&
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paddr < virt_to_phys(io_tlb_end);
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}
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/*
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* Bounce: copy the swiotlb buffer back to the original dma location
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*/
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void swiotlb_bounce(phys_addr_t phys, char *dma_addr, size_t size,
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enum dma_data_direction dir)
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{
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unsigned long pfn = PFN_DOWN(phys);
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if (PageHighMem(pfn_to_page(pfn))) {
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/* The buffer does not have a mapping. Map it in and copy */
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unsigned int offset = phys & ~PAGE_MASK;
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char *buffer;
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unsigned int sz = 0;
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unsigned long flags;
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while (size) {
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sz = min_t(size_t, PAGE_SIZE - offset, size);
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local_irq_save(flags);
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buffer = kmap_atomic(pfn_to_page(pfn));
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if (dir == DMA_TO_DEVICE)
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memcpy(dma_addr, buffer + offset, sz);
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else
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memcpy(buffer + offset, dma_addr, sz);
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kunmap_atomic(buffer);
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local_irq_restore(flags);
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size -= sz;
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pfn++;
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dma_addr += sz;
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offset = 0;
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}
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} else {
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if (dir == DMA_TO_DEVICE)
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memcpy(dma_addr, phys_to_virt(phys), size);
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else
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memcpy(phys_to_virt(phys), dma_addr, size);
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}
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}
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EXPORT_SYMBOL_GPL(swiotlb_bounce);
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void *swiotlb_tbl_map_single(struct device *hwdev, dma_addr_t tbl_dma_addr,
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phys_addr_t phys, size_t size,
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enum dma_data_direction dir)
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{
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unsigned long flags;
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char *dma_addr;
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unsigned int nslots, stride, index, wrap;
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int i;
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unsigned long mask;
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unsigned long offset_slots;
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unsigned long max_slots;
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mask = dma_get_seg_boundary(hwdev);
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tbl_dma_addr &= mask;
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offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
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|
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/*
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* Carefully handle integer overflow which can occur when mask == ~0UL.
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*/
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max_slots = mask + 1
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? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
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: 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
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|
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/*
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* For mappings greater than a page, we limit the stride (and
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* hence alignment) to a page size.
|
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*/
|
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nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
|
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if (size > PAGE_SIZE)
|
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stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
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else
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stride = 1;
|
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|
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BUG_ON(!nslots);
|
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|
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/*
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* Find suitable number of IO TLB entries size that will fit this
|
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* request and allocate a buffer from that IO TLB pool.
|
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*/
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spin_lock_irqsave(&io_tlb_lock, flags);
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index = ALIGN(io_tlb_index, stride);
|
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if (index >= io_tlb_nslabs)
|
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index = 0;
|
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wrap = index;
|
|
|
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do {
|
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while (iommu_is_span_boundary(index, nslots, offset_slots,
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max_slots)) {
|
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index += stride;
|
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if (index >= io_tlb_nslabs)
|
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index = 0;
|
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if (index == wrap)
|
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goto not_found;
|
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}
|
|
|
|
/*
|
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* If we find a slot that indicates we have 'nslots' number of
|
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* contiguous buffers, we allocate the buffers from that slot
|
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* and mark the entries as '0' indicating unavailable.
|
|
*/
|
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if (io_tlb_list[index] >= nslots) {
|
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int count = 0;
|
|
|
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for (i = index; i < (int) (index + nslots); i++)
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io_tlb_list[i] = 0;
|
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for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
|
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io_tlb_list[i] = ++count;
|
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dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
|
|
|
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/*
|
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* Update the indices to avoid searching in the next
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* round.
|
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*/
|
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io_tlb_index = ((index + nslots) < io_tlb_nslabs
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? (index + nslots) : 0);
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|
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goto found;
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}
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index += stride;
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if (index >= io_tlb_nslabs)
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index = 0;
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} while (index != wrap);
|
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|
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not_found:
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spin_unlock_irqrestore(&io_tlb_lock, flags);
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return NULL;
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found:
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spin_unlock_irqrestore(&io_tlb_lock, flags);
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|
|
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/*
|
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* Save away the mapping from the original address to the DMA address.
|
|
* This is needed when we sync the memory. Then we sync the buffer if
|
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* needed.
|
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*/
|
|
for (i = 0; i < nslots; i++)
|
|
io_tlb_orig_addr[index+i] = phys + (i << IO_TLB_SHIFT);
|
|
if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
|
|
swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
|
|
|
|
return dma_addr;
|
|
}
|
|
EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single);
|
|
|
|
/*
|
|
* Allocates bounce buffer and returns its kernel virtual address.
|
|
*/
|
|
|
|
static void *
|
|
map_single(struct device *hwdev, phys_addr_t phys, size_t size,
|
|
enum dma_data_direction dir)
|
|
{
|
|
dma_addr_t start_dma_addr = swiotlb_virt_to_bus(hwdev, io_tlb_start);
|
|
|
|
return swiotlb_tbl_map_single(hwdev, start_dma_addr, phys, size, dir);
|
|
}
|
|
|
|
/*
|
|
* dma_addr is the kernel virtual address of the bounce buffer to unmap.
|
|
*/
|
|
void
|
|
swiotlb_tbl_unmap_single(struct device *hwdev, char *dma_addr, size_t size,
|
|
enum dma_data_direction dir)
|
|
{
|
|
unsigned long flags;
|
|
int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
|
|
int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
|
|
phys_addr_t phys = io_tlb_orig_addr[index];
|
|
|
|
/*
|
|
* First, sync the memory before unmapping the entry
|
|
*/
|
|
if (phys && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
|
|
swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
|
|
|
|
/*
|
|
* Return the buffer to the free list by setting the corresponding
|
|
* entries to indicate the number of contiguous entries available.
|
|
* While returning the entries to the free list, we merge the entries
|
|
* with slots below and above the pool being returned.
|
|
*/
|
|
spin_lock_irqsave(&io_tlb_lock, flags);
|
|
{
|
|
count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
|
|
io_tlb_list[index + nslots] : 0);
|
|
/*
|
|
* Step 1: return the slots to the free list, merging the
|
|
* slots with superceeding slots
|
|
*/
|
|
for (i = index + nslots - 1; i >= index; i--)
|
|
io_tlb_list[i] = ++count;
|
|
/*
|
|
* Step 2: merge the returned slots with the preceding slots,
|
|
* if available (non zero)
|
|
*/
|
|
for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
|
|
io_tlb_list[i] = ++count;
|
|
}
|
|
spin_unlock_irqrestore(&io_tlb_lock, flags);
|
|
}
|
|
EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single);
|
|
|
|
void
|
|
swiotlb_tbl_sync_single(struct device *hwdev, char *dma_addr, size_t size,
|
|
enum dma_data_direction dir,
|
|
enum dma_sync_target target)
|
|
{
|
|
int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
|
|
phys_addr_t phys = io_tlb_orig_addr[index];
|
|
|
|
phys += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
|
|
|
|
switch (target) {
|
|
case SYNC_FOR_CPU:
|
|
if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
|
|
swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
|
|
else
|
|
BUG_ON(dir != DMA_TO_DEVICE);
|
|
break;
|
|
case SYNC_FOR_DEVICE:
|
|
if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
|
|
swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
|
|
else
|
|
BUG_ON(dir != DMA_FROM_DEVICE);
|
|
break;
|
|
default:
|
|
BUG();
|
|
}
|
|
}
|
|
EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single);
|
|
|
|
void *
|
|
swiotlb_alloc_coherent(struct device *hwdev, size_t size,
|
|
dma_addr_t *dma_handle, gfp_t flags)
|
|
{
|
|
dma_addr_t dev_addr;
|
|
void *ret;
|
|
int order = get_order(size);
|
|
u64 dma_mask = DMA_BIT_MASK(32);
|
|
|
|
if (hwdev && hwdev->coherent_dma_mask)
|
|
dma_mask = hwdev->coherent_dma_mask;
|
|
|
|
ret = (void *)__get_free_pages(flags, order);
|
|
if (ret && swiotlb_virt_to_bus(hwdev, ret) + size - 1 > dma_mask) {
|
|
/*
|
|
* The allocated memory isn't reachable by the device.
|
|
*/
|
|
free_pages((unsigned long) ret, order);
|
|
ret = NULL;
|
|
}
|
|
if (!ret) {
|
|
/*
|
|
* We are either out of memory or the device can't DMA to
|
|
* GFP_DMA memory; fall back on map_single(), which
|
|
* will grab memory from the lowest available address range.
|
|
*/
|
|
ret = map_single(hwdev, 0, size, DMA_FROM_DEVICE);
|
|
if (!ret)
|
|
return NULL;
|
|
}
|
|
|
|
memset(ret, 0, size);
|
|
dev_addr = swiotlb_virt_to_bus(hwdev, ret);
|
|
|
|
/* Confirm address can be DMA'd by device */
|
|
if (dev_addr + size - 1 > dma_mask) {
|
|
printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
|
|
(unsigned long long)dma_mask,
|
|
(unsigned long long)dev_addr);
|
|
|
|
/* DMA_TO_DEVICE to avoid memcpy in unmap_single */
|
|
swiotlb_tbl_unmap_single(hwdev, ret, size, DMA_TO_DEVICE);
|
|
return NULL;
|
|
}
|
|
*dma_handle = dev_addr;
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL(swiotlb_alloc_coherent);
|
|
|
|
void
|
|
swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
|
|
dma_addr_t dev_addr)
|
|
{
|
|
phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
|
|
|
|
WARN_ON(irqs_disabled());
|
|
if (!is_swiotlb_buffer(paddr))
|
|
free_pages((unsigned long)vaddr, get_order(size));
|
|
else
|
|
/* DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single */
|
|
swiotlb_tbl_unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE);
|
|
}
|
|
EXPORT_SYMBOL(swiotlb_free_coherent);
|
|
|
|
static void
|
|
swiotlb_full(struct device *dev, size_t size, enum dma_data_direction dir,
|
|
int do_panic)
|
|
{
|
|
/*
|
|
* Ran out of IOMMU space for this operation. This is very bad.
|
|
* Unfortunately the drivers cannot handle this operation properly.
|
|
* unless they check for dma_mapping_error (most don't)
|
|
* When the mapping is small enough return a static buffer to limit
|
|
* the damage, or panic when the transfer is too big.
|
|
*/
|
|
printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
|
|
"device %s\n", size, dev ? dev_name(dev) : "?");
|
|
|
|
if (size <= io_tlb_overflow || !do_panic)
|
|
return;
|
|
|
|
if (dir == DMA_BIDIRECTIONAL)
|
|
panic("DMA: Random memory could be DMA accessed\n");
|
|
if (dir == DMA_FROM_DEVICE)
|
|
panic("DMA: Random memory could be DMA written\n");
|
|
if (dir == DMA_TO_DEVICE)
|
|
panic("DMA: Random memory could be DMA read\n");
|
|
}
|
|
|
|
/*
|
|
* Map a single buffer of the indicated size for DMA in streaming mode. The
|
|
* physical address to use is returned.
|
|
*
|
|
* Once the device is given the dma address, the device owns this memory until
|
|
* either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
|
|
*/
|
|
dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
|
|
unsigned long offset, size_t size,
|
|
enum dma_data_direction dir,
|
|
struct dma_attrs *attrs)
|
|
{
|
|
phys_addr_t phys = page_to_phys(page) + offset;
|
|
dma_addr_t dev_addr = phys_to_dma(dev, phys);
|
|
void *map;
|
|
|
|
BUG_ON(dir == DMA_NONE);
|
|
/*
|
|
* If the address happens to be in the device's DMA window,
|
|
* we can safely return the device addr and not worry about bounce
|
|
* buffering it.
|
|
*/
|
|
if (dma_capable(dev, dev_addr, size) && !swiotlb_force)
|
|
return dev_addr;
|
|
|
|
/*
|
|
* Oh well, have to allocate and map a bounce buffer.
|
|
*/
|
|
map = map_single(dev, phys, size, dir);
|
|
if (!map) {
|
|
swiotlb_full(dev, size, dir, 1);
|
|
map = io_tlb_overflow_buffer;
|
|
}
|
|
|
|
dev_addr = swiotlb_virt_to_bus(dev, map);
|
|
|
|
/*
|
|
* Ensure that the address returned is DMA'ble
|
|
*/
|
|
if (!dma_capable(dev, dev_addr, size)) {
|
|
swiotlb_tbl_unmap_single(dev, map, size, dir);
|
|
dev_addr = swiotlb_virt_to_bus(dev, io_tlb_overflow_buffer);
|
|
}
|
|
|
|
return dev_addr;
|
|
}
|
|
EXPORT_SYMBOL_GPL(swiotlb_map_page);
|
|
|
|
/*
|
|
* Unmap a single streaming mode DMA translation. The dma_addr and size must
|
|
* match what was provided for in a previous swiotlb_map_page call. All
|
|
* other usages are undefined.
|
|
*
|
|
* After this call, reads by the cpu to the buffer are guaranteed to see
|
|
* whatever the device wrote there.
|
|
*/
|
|
static void unmap_single(struct device *hwdev, dma_addr_t dev_addr,
|
|
size_t size, enum dma_data_direction dir)
|
|
{
|
|
phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
|
|
|
|
BUG_ON(dir == DMA_NONE);
|
|
|
|
if (is_swiotlb_buffer(paddr)) {
|
|
swiotlb_tbl_unmap_single(hwdev, phys_to_virt(paddr), size, dir);
|
|
return;
|
|
}
|
|
|
|
if (dir != DMA_FROM_DEVICE)
|
|
return;
|
|
|
|
/*
|
|
* phys_to_virt doesn't work with hihgmem page but we could
|
|
* call dma_mark_clean() with hihgmem page here. However, we
|
|
* are fine since dma_mark_clean() is null on POWERPC. We can
|
|
* make dma_mark_clean() take a physical address if necessary.
|
|
*/
|
|
dma_mark_clean(phys_to_virt(paddr), size);
|
|
}
|
|
|
|
void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
|
|
size_t size, enum dma_data_direction dir,
|
|
struct dma_attrs *attrs)
|
|
{
|
|
unmap_single(hwdev, dev_addr, size, dir);
|
|
}
|
|
EXPORT_SYMBOL_GPL(swiotlb_unmap_page);
|
|
|
|
/*
|
|
* Make physical memory consistent for a single streaming mode DMA translation
|
|
* after a transfer.
|
|
*
|
|
* If you perform a swiotlb_map_page() but wish to interrogate the buffer
|
|
* using the cpu, yet do not wish to teardown the dma mapping, you must
|
|
* call this function before doing so. At the next point you give the dma
|
|
* address back to the card, you must first perform a
|
|
* swiotlb_dma_sync_for_device, and then the device again owns the buffer
|
|
*/
|
|
static void
|
|
swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
|
|
size_t size, enum dma_data_direction dir,
|
|
enum dma_sync_target target)
|
|
{
|
|
phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
|
|
|
|
BUG_ON(dir == DMA_NONE);
|
|
|
|
if (is_swiotlb_buffer(paddr)) {
|
|
swiotlb_tbl_sync_single(hwdev, phys_to_virt(paddr), size, dir,
|
|
target);
|
|
return;
|
|
}
|
|
|
|
if (dir != DMA_FROM_DEVICE)
|
|
return;
|
|
|
|
dma_mark_clean(phys_to_virt(paddr), size);
|
|
}
|
|
|
|
void
|
|
swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
|
|
size_t size, enum dma_data_direction dir)
|
|
{
|
|
swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
|
|
}
|
|
EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
|
|
|
|
void
|
|
swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
|
|
size_t size, enum dma_data_direction dir)
|
|
{
|
|
swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
|
|
}
|
|
EXPORT_SYMBOL(swiotlb_sync_single_for_device);
|
|
|
|
/*
|
|
* Map a set of buffers described by scatterlist in streaming mode for DMA.
|
|
* This is the scatter-gather version of the above swiotlb_map_page
|
|
* interface. Here the scatter gather list elements are each tagged with the
|
|
* appropriate dma address and length. They are obtained via
|
|
* sg_dma_{address,length}(SG).
|
|
*
|
|
* NOTE: An implementation may be able to use a smaller number of
|
|
* DMA address/length pairs than there are SG table elements.
|
|
* (for example via virtual mapping capabilities)
|
|
* The routine returns the number of addr/length pairs actually
|
|
* used, at most nents.
|
|
*
|
|
* Device ownership issues as mentioned above for swiotlb_map_page are the
|
|
* same here.
|
|
*/
|
|
int
|
|
swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
|
|
enum dma_data_direction dir, struct dma_attrs *attrs)
|
|
{
|
|
struct scatterlist *sg;
|
|
int i;
|
|
|
|
BUG_ON(dir == DMA_NONE);
|
|
|
|
for_each_sg(sgl, sg, nelems, i) {
|
|
phys_addr_t paddr = sg_phys(sg);
|
|
dma_addr_t dev_addr = phys_to_dma(hwdev, paddr);
|
|
|
|
if (swiotlb_force ||
|
|
!dma_capable(hwdev, dev_addr, sg->length)) {
|
|
void *map = map_single(hwdev, sg_phys(sg),
|
|
sg->length, dir);
|
|
if (!map) {
|
|
/* Don't panic here, we expect map_sg users
|
|
to do proper error handling. */
|
|
swiotlb_full(hwdev, sg->length, dir, 0);
|
|
swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
|
|
attrs);
|
|
sgl[0].dma_length = 0;
|
|
return 0;
|
|
}
|
|
sg->dma_address = swiotlb_virt_to_bus(hwdev, map);
|
|
} else
|
|
sg->dma_address = dev_addr;
|
|
sg->dma_length = sg->length;
|
|
}
|
|
return nelems;
|
|
}
|
|
EXPORT_SYMBOL(swiotlb_map_sg_attrs);
|
|
|
|
int
|
|
swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
|
|
enum dma_data_direction dir)
|
|
{
|
|
return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
|
|
}
|
|
EXPORT_SYMBOL(swiotlb_map_sg);
|
|
|
|
/*
|
|
* Unmap a set of streaming mode DMA translations. Again, cpu read rules
|
|
* concerning calls here are the same as for swiotlb_unmap_page() above.
|
|
*/
|
|
void
|
|
swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
|
|
int nelems, enum dma_data_direction dir, struct dma_attrs *attrs)
|
|
{
|
|
struct scatterlist *sg;
|
|
int i;
|
|
|
|
BUG_ON(dir == DMA_NONE);
|
|
|
|
for_each_sg(sgl, sg, nelems, i)
|
|
unmap_single(hwdev, sg->dma_address, sg->dma_length, dir);
|
|
|
|
}
|
|
EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
|
|
|
|
void
|
|
swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
|
|
enum dma_data_direction dir)
|
|
{
|
|
return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
|
|
}
|
|
EXPORT_SYMBOL(swiotlb_unmap_sg);
|
|
|
|
/*
|
|
* Make physical memory consistent for a set of streaming mode DMA translations
|
|
* after a transfer.
|
|
*
|
|
* The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
|
|
* and usage.
|
|
*/
|
|
static void
|
|
swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
|
|
int nelems, enum dma_data_direction dir,
|
|
enum dma_sync_target target)
|
|
{
|
|
struct scatterlist *sg;
|
|
int i;
|
|
|
|
for_each_sg(sgl, sg, nelems, i)
|
|
swiotlb_sync_single(hwdev, sg->dma_address,
|
|
sg->dma_length, dir, target);
|
|
}
|
|
|
|
void
|
|
swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
|
|
int nelems, enum dma_data_direction dir)
|
|
{
|
|
swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
|
|
}
|
|
EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
|
|
|
|
void
|
|
swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
|
|
int nelems, enum dma_data_direction dir)
|
|
{
|
|
swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
|
|
}
|
|
EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
|
|
|
|
int
|
|
swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
|
|
{
|
|
return (dma_addr == swiotlb_virt_to_bus(hwdev, io_tlb_overflow_buffer));
|
|
}
|
|
EXPORT_SYMBOL(swiotlb_dma_mapping_error);
|
|
|
|
/*
|
|
* Return whether the given device DMA address mask can be supported
|
|
* properly. For example, if your device can only drive the low 24-bits
|
|
* during bus mastering, then you would pass 0x00ffffff as the mask to
|
|
* this function.
|
|
*/
|
|
int
|
|
swiotlb_dma_supported(struct device *hwdev, u64 mask)
|
|
{
|
|
return swiotlb_virt_to_bus(hwdev, io_tlb_end - 1) <= mask;
|
|
}
|
|
EXPORT_SYMBOL(swiotlb_dma_supported);
|