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94e205bfb7
Sets the ADSP1 clock rate to match the system clock rate. To support this the codec driver provides details of register containing the system clock control bits. Signed-off-by: Chris Rattray <crattray@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
77 lines
1.7 KiB
C
77 lines
1.7 KiB
C
/*
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* wm_adsp.h -- Wolfson ADSP support
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*
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* Copyright 2012 Wolfson Microelectronics plc
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*
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* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __WM_ADSP_H
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#define __WM_ADSP_H
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#include <sound/soc.h>
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#include <sound/soc-dapm.h>
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#include "wmfw.h"
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struct regulator;
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struct wm_adsp_region {
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int type;
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unsigned int base;
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};
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struct wm_adsp_alg_region {
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struct list_head list;
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unsigned int alg;
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int type;
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unsigned int base;
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};
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struct wm_adsp {
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const char *part;
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int num;
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int type;
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struct device *dev;
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struct regmap *regmap;
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int base;
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int sysclk_reg;
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int sysclk_mask;
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int sysclk_shift;
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struct list_head alg_regions;
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const struct wm_adsp_region *mem;
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int num_mems;
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int fw;
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bool running;
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struct regulator *dvfs;
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};
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#define WM_ADSP1(wname, num) \
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{ .id = snd_soc_dapm_pga, .name = wname, .reg = SND_SOC_NOPM, \
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.shift = num, .event = wm_adsp1_event, \
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.event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD }
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#define WM_ADSP2(wname, num) \
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{ .id = snd_soc_dapm_pga, .name = wname, .reg = SND_SOC_NOPM, \
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.shift = num, .event = wm_adsp2_event, \
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.event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD }
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extern const struct snd_kcontrol_new wm_adsp_fw_controls[];
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int wm_adsp1_init(struct wm_adsp *adsp);
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int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs);
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int wm_adsp1_event(struct snd_soc_dapm_widget *w,
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struct snd_kcontrol *kcontrol, int event);
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int wm_adsp2_event(struct snd_soc_dapm_widget *w,
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struct snd_kcontrol *kcontrol, int event);
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#endif
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