linux-stable/drivers/clk
Manivannan Sadhasivam 5a5223ffd7 clk: qcom: Add A7 PLL support
Add support for PLL found in Qualcomm SDX55 platforms which is used to
provide clock to the Cortex A7 CPU via a mux. This PLL can provide high
frequency clock to the CPU above 1GHz as compared to the other sources
like GPLL0.

In this driver, the power domain is attached to the cpudev. This is
required for CPUFreq functionality and there seems to be no better place
to do other than this driver (no dedicated CPUFreq driver).

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210118041156.50016-5-manivannan.sadhasivam@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08 09:46:23 -08:00
..
actions clk: actions: Add Actions S500 SoC Reset Management Unit support 2020-07-21 01:50:47 -07:00
analogbits
at91 clk: at91: sam9x60: remove atmel,osc-bypass support 2020-12-19 15:33:00 -08:00
axis
axs10x clk: axs10x: use devm_platform_ioremap_resource() to simplify code 2019-10-16 16:17:50 -07:00
baikal-t1 clk: baikal-t1: Mark Ethernet PLL as critical 2020-10-13 19:48:34 -07:00
bcm clk: bcm: dvp: Add MODULE_DEVICE_TABLE() 2020-12-19 11:48:29 -08:00
berlin
davinci This pull request contains zero diff to the core framework. It is a collection 2020-10-22 12:53:28 -07:00
h8300
hisilicon Merge branches 'clk-hisi', 'clk-amlogic', 'clk-samsung', 'clk-renesas' and 'clk-imx' into clk-next 2019-11-27 08:14:17 -08:00
imgtec treewide: replace '---help---' in Kconfig files with 'help' 2020-06-14 01:57:21 +09:00
imx The core framework got some nice improvements this time around. We gained the 2020-12-21 10:39:37 -08:00
ingenic clk: ingenic: Fix divider calculation with div tables 2020-12-19 16:04:58 -08:00
keystone clk: keystone: sci-clk: add 10% slack to set_rate 2020-09-22 12:58:52 -07:00
loongson1
mediatek clk: mediatek: Make mtk_clk_register_mux() a static function 2020-12-17 00:41:54 -08:00
meson The core framework got some nice improvements this time around. We gained the 2020-12-21 10:39:37 -08:00
microchip clk: let init callback return an error code 2019-12-23 18:53:13 -08:00
mmp Merge branches 'clk-semicolon', 'clk-axi-clkgen', 'clk-qoriq', 'clk-baikal', 'clk-const' and 'clk-mmp2' into clk-next 2020-10-20 11:47:02 -07:00
mvebu clk: mvebu: a3700: fix the XTAL MODE pin to MPP1_9 2020-12-19 15:51:18 -08:00
mxs
nxp
pistachio
pxa clk: pxa: Constify static struct clk_ops 2020-10-13 19:49:11 -07:00
qcom clk: qcom: Add A7 PLL support 2021-02-08 09:46:23 -08:00
renesas The core framework got some nice improvements this time around. We gained the 2020-12-21 10:39:37 -08:00
rockchip clk: rockchip: fix i2s gate bits on rk3066 and rk3188 2020-11-29 20:10:45 +01:00
samsung The core framework got some nice improvements this time around. We gained the 2020-12-21 10:39:37 -08:00
sifive clk: sifive: Add clock enable and disable ops 2020-12-16 12:23:13 -08:00
sirf clk: clk-prima2: fix return value check in prima2_clk_init() 2020-10-13 19:54:30 -07:00
socfpga This pull request contains zero diff to the core framework. It is a collection 2020-10-22 12:53:28 -07:00
spear clk: spear: Remove uninitialized_var() usage 2020-07-16 12:32:26 -07:00
sprd This time around we have 4 lines of diff in the core framework, removing a 2020-06-10 11:42:19 -07:00
st clk: st: Remove uninitialized_var() usage 2020-07-16 12:32:25 -07:00
sunxi clk: sunxi: Fix incorrect usage of round_down() 2020-04-14 09:21:05 +02:00
sunxi-ng clk: sunxi-ng: Make sure divider tables have sentinel 2020-12-19 15:54:02 -08:00
tegra The core framework got some nice improvements this time around. We gained the 2020-12-21 10:39:37 -08:00
ti The core framework got some nice improvements this time around. We gained the 2020-12-21 10:39:37 -08:00
uniphier clk: uniphier: use semicolons rather than commas to separate statements 2020-10-13 17:43:03 -07:00
ux500 clk: ux500: Fix up the SGA clock for some variants 2020-01-04 23:27:15 -08:00
versatile clk: versatile: Add of_node_put() before return statement 2020-09-10 00:57:42 -07:00
x86 More ACPI updates for 5.9-rc1 2020-08-15 08:18:22 -07:00
zte clk: zx296718: Don't reference clk_init_data after registration 2019-08-16 10:20:15 -07:00
zynq
zynqmp This time around we have 4 lines of diff in the core framework, removing a 2020-06-10 11:42:19 -07:00
clk-asm9260.c clk: asm9260: fix __clk_hw_register_fixed_rate_with_accuracy typo 2020-04-13 12:20:06 -07:00
clk-aspeed.c clk: aspeed: Add RMII RCLK gates for both AST2500 MACs 2019-11-26 10:02:48 -08:00
clk-aspeed.h clk: aspeed: Move structures to header 2019-09-06 15:17:02 -07:00
clk-ast2600.c clk: AST2600: Add mux for EMMC clock 2020-07-11 09:15:33 -07:00
clk-axi-clkgen.c clk: axi-clkgen: move the OF table at the bottom of the file 2020-12-17 01:52:54 -08:00
clk-axm5516.c
clk-bd718x7.c clk: bd718x7: Support ROHM BD71828 clk block 2020-01-24 07:22:47 +00:00
clk-bm1880.c clk: bm1800: Remove set but not used variable 'fref' 2019-12-24 00:10:33 -08:00
clk-bulk.c clk: Make clk_bulk_get_all() return a valid "id" 2019-09-17 13:26:31 -07:00
clk-cdce706.c Replace HTTP links with HTTPS ones: Common CLK framework 2020-07-10 17:15:34 -07:00
clk-cdce925.c clk: clk-cdce925: Add regulator support 2019-09-06 10:31:16 -07:00
clk-clps711x.c
clk-composite.c clk: composite: add devm_clk_hw_register_composite_pdata() 2020-12-07 14:06:16 -08:00
clk-conf.c
clk-cs2000-cp.c
clk-devres.c
clk-divider.c clk: divider: add devm_clk_hw_register_divider_table() 2020-12-07 16:53:39 -08:00
clk-efm32gg.c
clk-fixed-factor.c clk: fixed: add missing kerneldoc 2020-09-22 12:44:14 -07:00
clk-fixed-mmio.c
clk-fixed-rate.c clk: fixed: add missing kerneldoc 2020-09-22 12:44:14 -07:00
clk-fractional-divider.c
clk-fsl-flexspi.c clk: fsl-flexspi: new driver 2020-12-07 16:56:41 -08:00
clk-fsl-sai.c clk: fsl-sai: use devm_clk_hw_register_composite_pdata() 2020-12-07 14:06:16 -08:00
clk-gate.c treewide: Remove uninitialized_var() usage 2020-07-16 12:35:15 -07:00
clk-gemini.c
clk-gpio.c Replace HTTP links with HTTPS ones: Common CLK framework 2020-07-10 17:15:34 -07:00
clk-hi655x.c
clk-highbank.c
clk-hsdk-pll.c CLK: HSDK: CGU: add support for 148.5MHz clock 2020-05-28 21:06:39 -07:00
clk-lochnagar.c clk: lochnagar: Don't reference clk_init_data after registration 2019-08-16 10:20:07 -07:00
clk-max9485.c
clk-max77686.c
clk-milbeaut.c clk: milbeaut: Don't reference clk_init_data after registration 2019-08-16 10:20:15 -07:00
clk-moxart.c
clk-multiplier.c
clk-mux.c clk: mux: Add support for specifying parents via DT/pointers 2020-01-06 23:10:05 -08:00
clk-nomadik.c
clk-npcm7xx.c
clk-nspire.c
clk-oxnas.c
clk-palmas.c
clk-plldig.c clk: ls1028a: fix a dereference of pointer 'parent' before a null check 2020-02-03 23:03:49 -08:00
clk-pwm.c clk: pwm: drop of_match_ptr from of_device_id table 2020-12-10 12:24:18 -08:00
clk-qoriq.c clk: qoriq: provide constants for the type 2020-12-07 16:53:30 -08:00
clk-rk808.c
clk-s2mps11.c clk: s2mps11: Fix a resource leak in error handling paths in the probe function 2020-12-19 15:53:31 -08:00
clk-scmi.c clk: scmi: Fix min and max rate when registering clocks with discrete rates 2020-07-13 09:40:21 +01:00
clk-scpi.c clk: scpi: mark scpi_clk_match as maybe unused 2020-12-10 12:24:40 -08:00
clk-si514.c
clk-si544.c
clk-si570.c
clk-si5341.c clk: si5341: drop unused 'err' variable 2020-09-22 12:44:41 -07:00
clk-si5351.c clk: si5351: Wait for bit clear after PLL reset 2020-12-19 15:49:54 -08:00
clk-si5351.h
clk-sparx5.c clk: sparx5: Add Sparx5 SoC DPLL clock driver 2020-07-28 18:17:56 -07:00
clk-stm32f4.c
clk-stm32h7.c
clk-stm32mp1.c
clk-tango4.c
clk-twl6040.c
clk-u300.c
clk-versaclock5.c clk: vc5: Use "idt,voltage-microvolt" instead of "idt,voltage-microvolts" 2020-12-19 16:08:51 -08:00
clk-vt8500.c
clk-wm831x.c
clk-xgene.c
clk.c Merge branches 'clk-ti', 'clk-analog', 'clk-trace', 'clk-at91' and 'clk-silabs' into clk-next 2020-12-20 17:17:51 -08:00
clk.h
clkdev.c
Kconfig clk: fsl-flexspi: new driver 2020-12-07 16:56:41 -08:00
Makefile clk: fsl-flexspi: new driver 2020-12-07 16:56:41 -08:00