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0e5b9c085d
On systems with v8.2 we switch the 'vaxorcism' of guest SError with an alternative sequence that uses the ESB-instruction, then reads DISR_EL1. This saves the unmasking and remasking of asynchronous exceptions. We do this after we've saved the guest registers and restored the host's. Any SError that becomes pending due to this will be accounted to the guest, when it actually occurred during host-execution. Move the ESB-instruction as early as possible. Any guest SError will become pending due to this ESB-instruction and then consumed to DISR_EL1 before the host touches anything. This lets us account for host/guest SError precisely on the guest exit exception boundary. Because the ESB-instruction now lands in the preamble section of the vectors, we need to add it to the unpatched indirect vectors too, and to any sequence that may be patched in over the top. The ESB-instruction always lives in the head of the vectors, to be before any memory write. Whereas the register-store always lives in the tail. Signed-off-by: James Morse <james.morse@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
118 lines
3 KiB
C
118 lines
3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2012,2013 - ARM Ltd
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*/
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#ifndef __ARM_KVM_ASM_H__
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#define __ARM_KVM_ASM_H__
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#include <asm/virt.h>
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#define VCPU_WORKAROUND_2_FLAG_SHIFT 0
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#define VCPU_WORKAROUND_2_FLAG (_AC(1, UL) << VCPU_WORKAROUND_2_FLAG_SHIFT)
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#define ARM_EXIT_WITH_SERROR_BIT 31
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#define ARM_EXCEPTION_CODE(x) ((x) & ~(1U << ARM_EXIT_WITH_SERROR_BIT))
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#define ARM_EXCEPTION_IS_TRAP(x) (ARM_EXCEPTION_CODE((x)) == ARM_EXCEPTION_TRAP)
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#define ARM_SERROR_PENDING(x) !!((x) & (1U << ARM_EXIT_WITH_SERROR_BIT))
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#define ARM_EXCEPTION_IRQ 0
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#define ARM_EXCEPTION_EL1_SERROR 1
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#define ARM_EXCEPTION_TRAP 2
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#define ARM_EXCEPTION_IL 3
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/* The hyp-stub will return this for any kvm_call_hyp() call */
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#define ARM_EXCEPTION_HYP_GONE HVC_STUB_ERR
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#define kvm_arm_exception_type \
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{ARM_EXCEPTION_IRQ, "IRQ" }, \
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{ARM_EXCEPTION_EL1_SERROR, "SERROR" }, \
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{ARM_EXCEPTION_TRAP, "TRAP" }, \
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{ARM_EXCEPTION_HYP_GONE, "HYP_GONE" }
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/*
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* Size of the HYP vectors preamble. kvm_patch_vector_branch() generates code
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* that jumps over this.
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*/
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#define KVM_VECTOR_PREAMBLE (2 * AARCH64_INSN_SIZE)
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#ifndef __ASSEMBLY__
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#include <linux/mm.h>
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/* Translate a kernel address of @sym into its equivalent linear mapping */
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#define kvm_ksym_ref(sym) \
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({ \
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void *val = &sym; \
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if (!is_kernel_in_hyp_mode()) \
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val = lm_alias(&sym); \
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val; \
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})
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struct kvm;
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struct kvm_vcpu;
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extern char __kvm_hyp_init[];
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extern char __kvm_hyp_init_end[];
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extern char __kvm_hyp_vector[];
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extern void __kvm_flush_vm_context(void);
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extern void __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa);
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extern void __kvm_tlb_flush_vmid(struct kvm *kvm);
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extern void __kvm_tlb_flush_local_vmid(struct kvm_vcpu *vcpu);
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extern void __kvm_timer_set_cntvoff(u32 cntvoff_low, u32 cntvoff_high);
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extern int kvm_vcpu_run_vhe(struct kvm_vcpu *vcpu);
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extern int __kvm_vcpu_run_nvhe(struct kvm_vcpu *vcpu);
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extern u64 __vgic_v3_get_ich_vtr_el2(void);
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extern u64 __vgic_v3_read_vmcr(void);
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extern void __vgic_v3_write_vmcr(u32 vmcr);
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extern void __vgic_v3_init_lrs(void);
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extern u32 __kvm_get_mdcr_el2(void);
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/* Home-grown __this_cpu_{ptr,read} variants that always work at HYP */
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#define __hyp_this_cpu_ptr(sym) \
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({ \
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void *__ptr = hyp_symbol_addr(sym); \
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__ptr += read_sysreg(tpidr_el2); \
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(typeof(&sym))__ptr; \
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})
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#define __hyp_this_cpu_read(sym) \
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({ \
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*__hyp_this_cpu_ptr(sym); \
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})
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#else /* __ASSEMBLY__ */
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.macro hyp_adr_this_cpu reg, sym, tmp
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adr_l \reg, \sym
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mrs \tmp, tpidr_el2
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add \reg, \reg, \tmp
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.endm
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.macro hyp_ldr_this_cpu reg, sym, tmp
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adr_l \reg, \sym
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mrs \tmp, tpidr_el2
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ldr \reg, [\reg, \tmp]
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.endm
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.macro get_host_ctxt reg, tmp
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hyp_adr_this_cpu \reg, kvm_host_data, \tmp
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add \reg, \reg, #HOST_DATA_CONTEXT
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.endm
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.macro get_vcpu_ptr vcpu, ctxt
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get_host_ctxt \ctxt, \vcpu
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ldr \vcpu, [\ctxt, #HOST_CONTEXT_VCPU]
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kern_hyp_va \vcpu
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.endm
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#endif
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#endif /* __ARM_KVM_ASM_H__ */
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