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![Varun Sethi](/assets/img/avatar_default.png)
All SOC device error interrupts are muxed and delivered to the core as a single MPIC error interrupt. Currently all the device drivers requiring access to device errors have to register for the MPIC error interrupt as a shared interrupt. With this patch we add interrupt demuxing capability in the mpic driver, allowing device drivers to register for their individual error interrupts. This is achieved by handling error interrupts in a cascaded fashion. MPIC error interrupt is handled by the "error_int_handler", which subsequently demuxes it using the EISR and delivers it to the respective drivers. The error interrupt capability is dependent on the MPIC EIMR register, which was introduced in FSL MPIC version 4.1 (P4080 rev2). So, error interrupt demuxing capability is dependent on the MPIC version and can be used for versions >= 4.1. Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: Bogdan Hamciuc <bogdan.hamciuc@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
65 lines
1.7 KiB
C
65 lines
1.7 KiB
C
#ifndef _POWERPC_SYSDEV_MPIC_H
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#define _POWERPC_SYSDEV_MPIC_H
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/*
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* Copyright 2006-2007, Michael Ellerman, IBM Corporation.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; version 2 of the
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* License.
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*
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*/
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#ifdef CONFIG_PCI_MSI
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extern void mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq);
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extern int mpic_msi_init_allocator(struct mpic *mpic);
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extern int mpic_u3msi_init(struct mpic *mpic);
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extern int mpic_pasemi_msi_init(struct mpic *mpic);
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#else
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static inline void mpic_msi_reserve_hwirq(struct mpic *mpic,
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irq_hw_number_t hwirq)
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{
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return;
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}
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static inline int mpic_u3msi_init(struct mpic *mpic)
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{
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return -1;
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}
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static inline int mpic_pasemi_msi_init(struct mpic *mpic)
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{
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return -1;
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}
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#endif
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extern int mpic_set_irq_type(struct irq_data *d, unsigned int flow_type);
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extern void mpic_set_vector(unsigned int virq, unsigned int vector);
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extern int mpic_set_affinity(struct irq_data *d,
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const struct cpumask *cpumask, bool force);
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extern void mpic_reset_core(int cpu);
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#ifdef CONFIG_FSL_SOC
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extern int mpic_map_error_int(struct mpic *mpic, unsigned int virq, irq_hw_number_t hw);
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extern void mpic_err_int_init(struct mpic *mpic, irq_hw_number_t irqnum);
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extern int mpic_setup_error_int(struct mpic *mpic, int intvec);
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#else
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static inline int mpic_map_error_int(struct mpic *mpic, unsigned int virq, irq_hw_number_t hw)
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{
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return 0;
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}
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static inline void mpic_err_int_init(struct mpic *mpic, irq_hw_number_t irqnum)
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{
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return;
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}
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static inline int mpic_setup_error_int(struct mpic *mpic, int intvec)
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{
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return -1;
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}
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#endif
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#endif /* _POWERPC_SYSDEV_MPIC_H */
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