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![Kay Sievers](/assets/img/avatar_default.png)
This moves the 'cpu sysdev_class' over to a regular 'cpu' subsystem and converts the devices to regular devices. The sysdev drivers are implemented as subsystem interfaces now. After all sysdev classes are ported to regular driver core entities, the sysdev implementation will be entirely removed from the kernel. Userspace relies on events and generic sysfs subsystem infrastructure from sysdev devices, which are made available with this conversion. Cc: Haavard Skinnemoen <hskinnemoen@gmail.com> Cc: Hans-Christian Egtvedt <egtvedt@samfundet.no> Cc: Tony Luck <tony.luck@intel.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: "David S. Miller" <davem@davemloft.net> Cc: Chris Metcalf <cmetcalf@tilera.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Borislav Petkov <bp@amd64.org> Cc: Tigran Aivazian <tigran@aivazian.fsnet.co.uk> Cc: Len Brown <lenb@kernel.org> Cc: Zhang Rui <rui.zhang@intel.com> Cc: Dave Jones <davej@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Arjan van de Ven <arjan@linux.intel.com> Cc: "Rafael J. Wysocki" <rjw@sisk.pl> Cc: "Srivatsa S. Bhat" <srivatsa.bhat@linux.vnet.ibm.com> Signed-off-by: Kay Sievers <kay.sievers@vrfy.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
346 lines
7.6 KiB
C
346 lines
7.6 KiB
C
/*
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* PowerPC 4xx Clock and Power Management
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*
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* Copyright (C) 2010, Applied Micro Circuits Corporation
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* Victor Gallardo (vgallardo@apm.com)
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*
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* Based on arch/powerpc/platforms/44x/idle.c:
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* Jerone Young <jyoung5@us.ibm.com>
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* Copyright 2008 IBM Corp.
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*
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* Based on arch/powerpc/sysdev/fsl_pmc.c:
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* Anton Vorontsov <avorontsov@ru.mvista.com>
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* Copyright 2009 MontaVista Software, Inc.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <linux/kernel.h>
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#include <linux/of_platform.h>
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#include <linux/sysfs.h>
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#include <linux/cpu.h>
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#include <linux/suspend.h>
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#include <asm/dcr.h>
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#include <asm/dcr-native.h>
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#include <asm/machdep.h>
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#define CPM_ER 0
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#define CPM_FR 1
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#define CPM_SR 2
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#define CPM_IDLE_WAIT 0
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#define CPM_IDLE_DOZE 1
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struct cpm {
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dcr_host_t dcr_host;
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unsigned int dcr_offset[3];
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unsigned int powersave_off;
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unsigned int unused;
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unsigned int idle_doze;
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unsigned int standby;
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unsigned int suspend;
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};
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static struct cpm cpm;
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struct cpm_idle_mode {
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unsigned int enabled;
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const char *name;
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};
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static struct cpm_idle_mode idle_mode[] = {
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[CPM_IDLE_WAIT] = { 1, "wait" }, /* default */
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[CPM_IDLE_DOZE] = { 0, "doze" },
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};
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static unsigned int cpm_set(unsigned int cpm_reg, unsigned int mask)
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{
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unsigned int value;
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/* CPM controller supports 3 different types of sleep interface
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* known as class 1, 2 and 3. For class 1 units, they are
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* unconditionally put to sleep when the corresponding CPM bit is
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* set. For class 2 and 3 units this is not case; if they can be
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* put to to sleep, they will. Here we do not verify, we just
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* set them and expect them to eventually go off when they can.
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*/
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value = dcr_read(cpm.dcr_host, cpm.dcr_offset[cpm_reg]);
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dcr_write(cpm.dcr_host, cpm.dcr_offset[cpm_reg], value | mask);
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/* return old state, to restore later if needed */
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return value;
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}
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static void cpm_idle_wait(void)
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{
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unsigned long msr_save;
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/* save off initial state */
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msr_save = mfmsr();
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/* sync required when CPM0_ER[CPU] is set */
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mb();
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/* set wait state MSR */
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mtmsr(msr_save|MSR_WE|MSR_EE|MSR_CE|MSR_DE);
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isync();
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/* return to initial state */
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mtmsr(msr_save);
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isync();
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}
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static void cpm_idle_sleep(unsigned int mask)
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{
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unsigned int er_save;
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/* update CPM_ER state */
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er_save = cpm_set(CPM_ER, mask);
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/* go to wait state so that CPM0_ER[CPU] can take effect */
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cpm_idle_wait();
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/* restore CPM_ER state */
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dcr_write(cpm.dcr_host, cpm.dcr_offset[CPM_ER], er_save);
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}
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static void cpm_idle_doze(void)
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{
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cpm_idle_sleep(cpm.idle_doze);
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}
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static void cpm_idle_config(int mode)
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{
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int i;
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if (idle_mode[mode].enabled)
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return;
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for (i = 0; i < ARRAY_SIZE(idle_mode); i++)
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idle_mode[i].enabled = 0;
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idle_mode[mode].enabled = 1;
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}
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static ssize_t cpm_idle_show(struct kobject *kobj,
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struct kobj_attribute *attr, char *buf)
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{
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char *s = buf;
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int i;
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for (i = 0; i < ARRAY_SIZE(idle_mode); i++) {
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if (idle_mode[i].enabled)
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s += sprintf(s, "[%s] ", idle_mode[i].name);
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else
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s += sprintf(s, "%s ", idle_mode[i].name);
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}
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*(s-1) = '\n'; /* convert the last space to a newline */
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return s - buf;
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}
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static ssize_t cpm_idle_store(struct kobject *kobj,
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struct kobj_attribute *attr,
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const char *buf, size_t n)
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{
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int i;
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char *p;
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int len;
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p = memchr(buf, '\n', n);
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len = p ? p - buf : n;
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for (i = 0; i < ARRAY_SIZE(idle_mode); i++) {
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if (strncmp(buf, idle_mode[i].name, len) == 0) {
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cpm_idle_config(i);
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return n;
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}
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}
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return -EINVAL;
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}
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static struct kobj_attribute cpm_idle_attr =
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__ATTR(idle, 0644, cpm_idle_show, cpm_idle_store);
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static void cpm_idle_config_sysfs(void)
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{
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struct device *dev;
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unsigned long ret;
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dev = get_cpu_device(0);
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ret = sysfs_create_file(&dev->kobj,
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&cpm_idle_attr.attr);
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if (ret)
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printk(KERN_WARNING
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"cpm: failed to create idle sysfs entry\n");
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}
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static void cpm_idle(void)
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{
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if (idle_mode[CPM_IDLE_DOZE].enabled)
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cpm_idle_doze();
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else
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cpm_idle_wait();
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}
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static int cpm_suspend_valid(suspend_state_t state)
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{
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switch (state) {
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case PM_SUSPEND_STANDBY:
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return !!cpm.standby;
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case PM_SUSPEND_MEM:
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return !!cpm.suspend;
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default:
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return 0;
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}
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}
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static void cpm_suspend_standby(unsigned int mask)
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{
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unsigned long tcr_save;
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/* disable decrement interrupt */
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tcr_save = mfspr(SPRN_TCR);
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mtspr(SPRN_TCR, tcr_save & ~TCR_DIE);
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/* go to sleep state */
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cpm_idle_sleep(mask);
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/* restore decrement interrupt */
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mtspr(SPRN_TCR, tcr_save);
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}
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static int cpm_suspend_enter(suspend_state_t state)
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{
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switch (state) {
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case PM_SUSPEND_STANDBY:
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cpm_suspend_standby(cpm.standby);
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break;
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case PM_SUSPEND_MEM:
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cpm_suspend_standby(cpm.suspend);
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break;
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}
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return 0;
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}
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static struct platform_suspend_ops cpm_suspend_ops = {
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.valid = cpm_suspend_valid,
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.enter = cpm_suspend_enter,
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};
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static int cpm_get_uint_property(struct device_node *np,
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const char *name)
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{
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int len;
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const unsigned int *prop = of_get_property(np, name, &len);
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if (prop == NULL || len < sizeof(u32))
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return 0;
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return *prop;
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}
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static int __init cpm_init(void)
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{
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struct device_node *np;
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int dcr_base, dcr_len;
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int ret = 0;
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if (!cpm.powersave_off) {
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cpm_idle_config(CPM_IDLE_WAIT);
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ppc_md.power_save = &cpm_idle;
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}
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np = of_find_compatible_node(NULL, NULL, "ibm,cpm");
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if (!np) {
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ret = -EINVAL;
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goto out;
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}
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dcr_base = dcr_resource_start(np, 0);
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dcr_len = dcr_resource_len(np, 0);
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if (dcr_base == 0 || dcr_len == 0) {
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printk(KERN_ERR "cpm: could not parse dcr property for %s\n",
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np->full_name);
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ret = -EINVAL;
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goto out;
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}
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cpm.dcr_host = dcr_map(np, dcr_base, dcr_len);
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if (!DCR_MAP_OK(cpm.dcr_host)) {
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printk(KERN_ERR "cpm: failed to map dcr property for %s\n",
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np->full_name);
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ret = -EINVAL;
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goto out;
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}
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/* All 4xx SoCs with a CPM controller have one of two
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* different order for the CPM registers. Some have the
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* CPM registers in the following order (ER,FR,SR). The
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* others have them in the following order (SR,ER,FR).
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*/
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if (cpm_get_uint_property(np, "er-offset") == 0) {
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cpm.dcr_offset[CPM_ER] = 0;
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cpm.dcr_offset[CPM_FR] = 1;
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cpm.dcr_offset[CPM_SR] = 2;
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} else {
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cpm.dcr_offset[CPM_ER] = 1;
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cpm.dcr_offset[CPM_FR] = 2;
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cpm.dcr_offset[CPM_SR] = 0;
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}
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/* Now let's see what IPs to turn off for the following modes */
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cpm.unused = cpm_get_uint_property(np, "unused-units");
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cpm.idle_doze = cpm_get_uint_property(np, "idle-doze");
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cpm.standby = cpm_get_uint_property(np, "standby");
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cpm.suspend = cpm_get_uint_property(np, "suspend");
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/* If some IPs are unused let's turn them off now */
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if (cpm.unused) {
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cpm_set(CPM_ER, cpm.unused);
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cpm_set(CPM_FR, cpm.unused);
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}
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/* Now let's export interfaces */
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if (!cpm.powersave_off && cpm.idle_doze)
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cpm_idle_config_sysfs();
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if (cpm.standby || cpm.suspend)
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suspend_set_ops(&cpm_suspend_ops);
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out:
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if (np)
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of_node_put(np);
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return ret;
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}
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late_initcall(cpm_init);
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static int __init cpm_powersave_off(char *arg)
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{
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cpm.powersave_off = 1;
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return 0;
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}
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__setup("powersave=off", cpm_powersave_off);
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