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The CPU nodes should be described as children of "cpus" bus node with appropriate "reg" properties: cpus: '#address-cells' is a required property cpus: '#size-cells' is a required property cpu: 'device_type' is a required property cpu: 'reg' is a required property Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200907183313.29234-11-krzk@kernel.org
124 lines
2.5 KiB
Text
124 lines
2.5 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/*
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* Samsung's S3C2416 SoC device tree source
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*
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* Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de>
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*/
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#include <dt-bindings/clock/s3c2443.h>
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#include "s3c24xx.dtsi"
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#include "s3c2416-pinctrl.dtsi"
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/ {
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model = "Samsung S3C2416 SoC";
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compatible = "samsung,s3c2416";
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aliases {
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serial3 = &uart_3;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,arm926ej-s";
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reg = <0x0>;
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};
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};
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clocks: clock-controller@4c000000 {
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compatible = "samsung,s3c2416-clock";
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reg = <0x4c000000 0x40>;
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#clock-cells = <1>;
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};
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uart_3: serial@5000c000 {
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compatible = "samsung,s3c2440-uart";
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reg = <0x5000C000 0x4000>;
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interrupts = <1 18 24 4>, <1 18 25 4>;
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clock-names = "uart", "clk_uart_baud2",
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"clk_uart_baud3";
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clocks = <&clocks PCLK_UART3>, <&clocks PCLK_UART3>,
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<&clocks SCLK_UART>;
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status = "disabled";
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};
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sdhci_1: sdhci@4ac00000 {
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compatible = "samsung,s3c6410-sdhci";
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reg = <0x4AC00000 0x100>;
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interrupts = <0 0 21 3>;
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clock-names = "hsmmc", "mmc_busclk.0",
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"mmc_busclk.2";
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clocks = <&clocks HCLK_HSMMC0>, <&clocks HCLK_HSMMC0>,
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<&clocks MUX_HSMMC0>;
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status = "disabled";
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};
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sdhci_0: sdhci@4a800000 {
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compatible = "samsung,s3c6410-sdhci";
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reg = <0x4A800000 0x100>;
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interrupts = <0 0 20 3>;
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clock-names = "hsmmc", "mmc_busclk.0",
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"mmc_busclk.2";
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clocks = <&clocks HCLK_HSMMC1>, <&clocks HCLK_HSMMC1>,
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<&clocks MUX_HSMMC1>;
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status = "disabled";
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};
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};
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&i2c {
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compatible = "samsung,s3c2440-i2c";
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clocks = <&clocks PCLK_I2C0>;
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clock-names = "i2c";
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};
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&intc {
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compatible = "samsung,s3c2416-irq";
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};
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&pinctrl_0 {
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compatible = "samsung,s3c2416-pinctrl";
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};
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&rtc {
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compatible = "samsung,s3c2416-rtc";
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clocks = <&clocks PCLK_RTC>;
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clock-names = "rtc";
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};
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&timer {
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clocks = <&clocks PCLK_PWM>;
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clock-names = "timers";
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};
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&uart_0 {
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compatible = "samsung,s3c2440-uart";
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clock-names = "uart", "clk_uart_baud2",
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"clk_uart_baud3";
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clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
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<&clocks SCLK_UART>;
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};
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&uart_1 {
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compatible = "samsung,s3c2440-uart";
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clock-names = "uart", "clk_uart_baud2",
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"clk_uart_baud3";
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clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>,
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<&clocks SCLK_UART>;
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};
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&uart_2 {
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compatible = "samsung,s3c2440-uart";
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clock-names = "uart", "clk_uart_baud2",
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"clk_uart_baud3";
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clocks = <&clocks PCLK_UART2>, <&clocks PCLK_UART2>,
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<&clocks SCLK_UART>;
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};
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&watchdog {
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interrupts = <1 9 27 3>;
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clocks = <&clocks PCLK_WDT>;
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clock-names = "watchdog";
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};
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