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78efa6a766
Add the reg property to each channel node. This update is to accommodate the multicolor framework. In addition to the accommodation this allows the LEDs to be placed on any channel and allow designs to skip channels as opposed to requiring sequential order. Signed-off-by: Dan Murphy <dmurphy@ti.com> Acked-by: Pavel Machek <pavel@ucw.cz> Acked-by: Linus Walleij <linus.walleij@linaro.org> CC: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20200812195020.13568-7-dmurphy@ti.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
287 lines
6 KiB
Text
287 lines
6 KiB
Text
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright 2012 ST-Ericsson AB
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*/
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#include <dt-bindings/interrupt-controller/irq.h>
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#include "ste-href-family-pinctrl.dtsi"
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/ {
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memory {
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device_type = "memory";
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reg = <0x00000000 0x20000000>;
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};
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soc {
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uart@80120000 {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&u0_a_1_default>;
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pinctrl-1 = <&u0_a_1_sleep>;
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status = "okay";
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};
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/* This UART is unused and thus left disabled */
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uart@80121000 {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&u1rxtx_a_1_default>;
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pinctrl-1 = <&u1rxtx_a_1_sleep>;
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};
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uart@80007000 {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&u2rxtx_c_1_default>;
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pinctrl-1 = <&u2rxtx_c_1_sleep>;
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status = "okay";
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};
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i2c@80004000 {
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pinctrl-names = "default","sleep";
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pinctrl-0 = <&i2c0_a_1_default>;
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pinctrl-1 = <&i2c0_a_1_sleep>;
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status = "okay";
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};
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i2c@80122000 {
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pinctrl-names = "default","sleep";
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pinctrl-0 = <&i2c1_b_2_default>;
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pinctrl-1 = <&i2c1_b_2_sleep>;
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status = "okay";
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};
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i2c@80128000 {
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pinctrl-names = "default","sleep";
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pinctrl-0 = <&i2c2_b_2_default>;
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pinctrl-1 = <&i2c2_b_2_sleep>;
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status = "okay";
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lp5521@33 {
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compatible = "national,lp5521";
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reg = <0x33>;
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label = "lp5521_pri";
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clock-mode = /bits/ 8 <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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chan@0 {
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reg = <0>;
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led-cur = /bits/ 8 <0x2f>;
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max-cur = /bits/ 8 <0x5f>;
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linux,default-trigger = "heartbeat";
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};
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chan@1 {
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reg = <1>;
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led-cur = /bits/ 8 <0x2f>;
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max-cur = /bits/ 8 <0x5f>;
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};
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chan@2 {
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reg = <2>;
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led-cur = /bits/ 8 <0x2f>;
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max-cur = /bits/ 8 <0x5f>;
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};
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};
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lp5521@34 {
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compatible = "national,lp5521";
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reg = <0x34>;
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label = "lp5521_sec";
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clock-mode = /bits/ 8 <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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chan@0 {
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reg = <0>;
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led-cur = /bits/ 8 <0x2f>;
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max-cur = /bits/ 8 <0x5f>;
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};
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chan@1 {
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reg = <1>;
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led-cur = /bits/ 8 <0x2f>;
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max-cur = /bits/ 8 <0x5f>;
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};
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chan@2 {
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reg = <2>;
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led-cur = /bits/ 8 <0x2f>;
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max-cur = /bits/ 8 <0x5f>;
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};
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};
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bh1780@29 {
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compatible = "rohm,bh1780gli";
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reg = <0x29>;
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};
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};
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i2c@80110000 {
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pinctrl-names = "default","sleep";
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pinctrl-0 = <&i2c3_c_2_default>;
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pinctrl-1 = <&i2c3_c_2_sleep>;
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status = "okay";
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};
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/* ST6G3244ME level translator for 1.8/2.9 V */
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vmmci: regulator-gpio {
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compatible = "regulator-gpio";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <2900000>;
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regulator-name = "mmci-reg";
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regulator-type = "voltage";
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startup-delay-us = <100>;
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states = <1800000 0x1
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2900000 0x0>;
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};
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// External Micro SD slot
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sdi0_per1@80126000 {
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arm,primecell-periphid = <0x10480180>;
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max-frequency = <100000000>;
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bus-width = <4>;
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cap-sd-highspeed;
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cap-mmc-highspeed;
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sd-uhs-sdr12;
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sd-uhs-sdr25;
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full-pwr-cycle;
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st,sig-dir-dat0;
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st,sig-dir-dat2;
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st,sig-dir-cmd;
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st,sig-pin-fbclk;
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vmmc-supply = <&ab8500_ldo_aux3_reg>;
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vqmmc-supply = <&vmmci>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&mc0_a_1_default &sdi0_default_mode>;
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pinctrl-1 = <&mc0_a_1_sleep>;
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status = "okay";
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};
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// WLAN SDIO channel
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sdi1_per2@80118000 {
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arm,primecell-periphid = <0x10480180>;
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max-frequency = <100000000>;
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bus-width = <4>;
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non-removable;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&mc1_a_1_default>;
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pinctrl-1 = <&mc1_a_1_sleep>;
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status = "okay";
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};
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// PoP:ed eMMC
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sdi2_per3@80005000 {
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arm,primecell-periphid = <0x10480180>;
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max-frequency = <100000000>;
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bus-width = <8>;
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cap-mmc-highspeed;
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non-removable;
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vmmc-supply = <&db8500_vsmps2_reg>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&mc2_a_1_default>;
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pinctrl-1 = <&mc2_a_1_sleep>;
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status = "okay";
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};
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// On-board eMMC
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sdi4_per2@80114000 {
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arm,primecell-periphid = <0x10480180>;
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max-frequency = <100000000>;
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bus-width = <8>;
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cap-mmc-highspeed;
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non-removable;
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vmmc-supply = <&ab8500_ldo_aux2_reg>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&mc4_a_1_default>;
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pinctrl-1 = <&mc4_a_1_sleep>;
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status = "okay";
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};
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msp0: msp@80123000 {
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pinctrl-names = "default";
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pinctrl-0 = <&msp0txrxtfstck_a_1_default>;
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status = "okay";
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};
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msp1: msp@80124000 {
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pinctrl-names = "default";
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pinctrl-0 = <&msp1txrx_a_1_default>;
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status = "okay";
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};
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msp2: msp@80117000 {
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pinctrl-names = "default";
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pinctrl-0 = <&msp2_a_1_default>;
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};
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msp3: msp@80125000 {
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status = "okay";
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};
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prcmu@80157000 {
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ab8500 {
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ab8500-gpio {
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};
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ab8500_usb {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&usb_a_1_default>;
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pinctrl-1 = <&usb_a_1_sleep>;
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};
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ab8500-regulators {
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ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
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regulator-name = "V-DISPLAY";
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};
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ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
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regulator-name = "V-eMMC1";
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};
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ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
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regulator-name = "V-MMC-SD";
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};
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ab8500_ldo_intcore_reg: ab8500_ldo_intcore {
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regulator-name = "V-INTCORE";
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};
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ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
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regulator-name = "V-TVOUT";
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};
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ab8500_ldo_audio_reg: ab8500_ldo_audio {
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regulator-name = "V-AUD";
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};
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ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
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regulator-name = "V-AMIC1";
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};
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ab8500_ldo_anamic2_reg: ab8500_ldo_anamic2 {
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regulator-name = "V-AMIC2";
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};
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ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
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regulator-name = "V-DMIC";
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};
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ab8500_ldo_ana_reg: ab8500_ldo_ana {
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regulator-name = "V-CSI/DSI";
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};
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};
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};
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};
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pinctrl {
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sdi0 {
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sdi0_default_mode: sdi0_default {
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/* Some boards set additional settings here */
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};
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};
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};
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mcde@a0350000 {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&lcd_default_mode>;
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pinctrl-1 = <&lcd_sleep_mode>;
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};
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};
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};
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