mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-28 21:33:52 +00:00
2720008f42
There are few hardware variants of NVIDIA Tegra30-based Nexus 7 device: 1. WiFi-only (named Grouper) 2. GSM (named Tilapia) 3. Using Maxim PMIC (E1565 board ID) 4. Using Ti PMIC (PM269 board ID) This patch adds device-trees for known and tested variants. Link: https://wiki.postmarketos.org/wiki/Google_Nexus_7_2012_(asus-grouper) Tested-by: Pedro Ângelo <pangelo@void.io> Tested-by: Matt Merhar <mattmerhar@protonmail.com> Tested-by: Zack Pearsall <zpearsall@yahoo.com> Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
149 lines
4 KiB
Text
149 lines
4 KiB
Text
// SPDX-License-Identifier: GPL-2.0
|
|
|
|
#include "tegra30-asus-nexus7-grouper-common.dtsi"
|
|
#include "tegra30-asus-nexus7-grouper-memory-timings.dtsi"
|
|
|
|
/ {
|
|
compatible = "asus,grouper", "nvidia,tegra30";
|
|
|
|
display-panel {
|
|
panel-timing {
|
|
clock-frequency = <68000000>;
|
|
hactive = <800>;
|
|
vactive = <1280>;
|
|
hfront-porch = <24>;
|
|
hback-porch = <32>;
|
|
hsync-len = <24>;
|
|
vsync-len = <1>;
|
|
vfront-porch = <5>;
|
|
vback-porch = <32>;
|
|
};
|
|
};
|
|
|
|
pinmux@70000868 {
|
|
state_default: pinmux {
|
|
lcd_dc1_pd2 {
|
|
nvidia,pins = "lcd_dc1_pd2";
|
|
nvidia,function = "displaya";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
lcd_pwr2_pc6 {
|
|
nvidia,pins = "lcd_pwr2_pc6";
|
|
nvidia,function = "displaya";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
spi2_cs2_n_pw3 {
|
|
nvidia,pins = "spi2_cs2_n_pw3";
|
|
nvidia,function = "spi2";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
spi1_sck_px5 {
|
|
nvidia,pins = "spi1_sck_px5";
|
|
nvidia,function = "spi1";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
pu5 {
|
|
nvidia,pins = "pu5";
|
|
nvidia,function = "pwm2";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
spi1_miso_px7 {
|
|
nvidia,pins = "spi1_miso_px7";
|
|
nvidia,function = "spi1";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
spi2_mosi_px0 {
|
|
nvidia,pins = "spi2_mosi_px0";
|
|
nvidia,function = "spi2";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
kb_row7_pr7 {
|
|
nvidia,pins = "kb_row7_pr7";
|
|
nvidia,function = "kbc";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
pu3 {
|
|
nvidia,pins = "pu3";
|
|
nvidia,function = "rsvd4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
pu4 {
|
|
nvidia,pins = "pu4";
|
|
nvidia,function = "pwm1";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
kb_row15_ps7 {
|
|
nvidia,pins = "kb_row15_ps7";
|
|
nvidia,function = "kbc";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
kb_row3_pr3 {
|
|
nvidia,pins = "kb_row3_pr3";
|
|
nvidia,function = "kbc";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
kb_row13_ps5 {
|
|
nvidia,pins = "kb_row13_ps5";
|
|
nvidia,function = "kbc";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
gmi_wp_n_pc7 {
|
|
nvidia,pins = "gmi_wp_n_pc7",
|
|
"gmi_wait_pi7",
|
|
"gmi_cs4_n_pk2",
|
|
"gmi_cs3_n_pk4";
|
|
nvidia,function = "rsvd1";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
gmi_cs6_n_pi3 {
|
|
nvidia,pins = "gmi_cs6_n_pi3";
|
|
nvidia,function = "gmi";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
};
|
|
};
|
|
|
|
i2c@7000c500 {
|
|
nfc@28 {
|
|
compatible = "nxp,pn544-i2c";
|
|
reg = <0x28>;
|
|
clock-frequency = <100000>;
|
|
|
|
interrupt-parent = <&gpio>;
|
|
interrupts = <TEGRA_GPIO(X, 0) IRQ_TYPE_EDGE_RISING>;
|
|
|
|
enable-gpios = <&gpio TEGRA_GPIO(S, 7) GPIO_ACTIVE_HIGH>;
|
|
firmware-gpios = <&gpio TEGRA_GPIO(R, 3) GPIO_ACTIVE_HIGH>;
|
|
};
|
|
};
|
|
};
|