linux-stable/arch/x86/kernel/cpu
Tim Chen 66558b730f sched: Add cluster scheduler level for x86
There are x86 CPU architectures (e.g. Jacobsville) where L2 cahce is
shared among a cluster of cores instead of being exclusive to one
single core.

To prevent oversubscription of L2 cache, load should be balanced
between such L2 clusters, especially for tasks with no shared data.
On benchmark such as SPECrate mcf test, this change provides a boost
to performance especially on medium load system on Jacobsville.  on a
Jacobsville that has 24 Atom cores, arranged into 6 clusters of 4
cores each, the benchmark number is as follow:

 Improvement over baseline kernel for mcf_r
 copies		run time	base rate
 1		-0.1%		-0.2%
 6		25.1%		25.1%
 12		18.8%		19.0%
 24		0.3%		0.3%

So this looks pretty good. In terms of the system's task distribution,
some pretty bad clumping can be seen for the vanilla kernel without
the L2 cluster domain for the 6 and 12 copies case. With the extra
domain for cluster, the load does get evened out between the clusters.

Note this patch isn't an universal win as spreading isn't necessarily
a win, particually for those workload who can benefit from packing.

Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Signed-off-by: Barry Song <song.bao.hua@hisilicon.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lore.kernel.org/r/20210924085104.44806-4-21cnbao@gmail.com
2021-10-15 11:25:16 +02:00
..
mce x86/mce: Avoid infinite loop for copy from user recovery 2021-09-14 10:27:03 +02:00
microcode x86/microcode: Replace deprecated CPU-hotplug functions. 2021-08-10 14:46:27 +02:00
mtrr x86/mtrr: Replace deprecated CPU-hotplug functions. 2021-08-10 14:46:27 +02:00
resctrl - A first round of changes towards splitting the arch-specific bits from 2021-08-30 13:31:36 -07:00
sgx Merge branch 'akpm' (patches from Andrew) 2021-06-29 17:29:11 -07:00
.gitignore .gitignore: add SPDX License Identifier 2020-03-25 11:50:48 +01:00
acrn.c x86/acrn: Introduce acrn_cpuid_base() and hypervisor feature bits 2021-02-09 10:58:18 +01:00
amd.c x86/cpu: Add get_llc_id() helper function 2021-08-26 09:14:36 +02:00
aperfmperf.c x86/cpu: Avoid cpuinfo-induced IPIing of idle CPUs 2020-11-06 16:59:11 -08:00
bugs.c x86, prctl: Hook L1D flushing in via prctl 2021-07-28 11:42:25 +02:00
cacheinfo.c sched: Add cluster scheduler level for x86 2021-10-15 11:25:16 +02:00
centaur.c x86/cpu/centaur: Add Centaur family >=7 CPUs initialization support 2020-09-11 10:53:19 +02:00
common.c sched: Add cluster scheduler level for x86 2021-10-15 11:25:16 +02:00
cpu.h x86/tsx: Clear CPUID bits when TSX always force aborts 2021-06-15 17:46:48 +02:00
cpuid-deps.c x86/cpufeatures: Add SGX1 and SGX2 sub-features 2021-03-25 17:33:11 +01:00
cyrix.c x86: Fix various typos in comments 2021-03-18 15:31:53 +01:00
feat_ctl.c x86/cpu/intel: Allow SGX virtualization without Launch Control support 2021-04-06 09:43:41 +02:00
hygon.c perf/x86/rapl: Use CPUID bit on AMD and Hygon parts 2021-06-01 21:10:33 +02:00
hypervisor.c x86/paravirt: Remove const mark from x86_hyper_xen_hvm variable 2019-07-17 08:09:59 +02:00
intel.c Changes in this cycle were: 2021-06-28 13:30:02 -07:00
intel_epb.c x86: intel_epb: Do not build when CONFIG_PM is unset 2019-05-30 10:58:36 +02:00
intel_pconfig.c
Makefile x86/sgx: Initialize metadata for Enclave Page Cache (EPC) sections 2020-11-17 14:36:13 +01:00
match.c x86/cpu: Add a steppings field to struct x86_cpu_id 2020-04-20 12:19:21 +02:00
mkcapflags.sh x86/cpu: Print VMX flags in /proc/cpuinfo using VMX_FEATURES_* 2020-01-13 18:36:02 +01:00
mshyperv.c hyperv-next for 5.15 2021-09-01 18:25:20 -07:00
perfctr-watchdog.c x86/nmi_watchdog: Fix old-style NMI watchdog regression on old Intel CPUs 2021-06-10 10:04:40 +02:00
powerflags.c
proc.c x86/cpu: Print VMX flags in /proc/cpuinfo using VMX_FEATURES_* 2020-01-13 18:36:02 +01:00
rdrand.c x86/rdrand: Sanity-check RDRAND output 2019-10-01 19:55:32 +02:00
scattered.c x86/cpufeatures: Add SGX1 and SGX2 sub-features 2021-03-25 17:33:11 +01:00
topology.c x86: Fix various typos in comments 2021-03-18 15:31:53 +01:00
transmeta.c
tsx.c x86/tsx: Clear CPUID bits when TSX always force aborts 2021-06-15 17:46:48 +02:00
umc.c
umwait.c KVM: VMX: Stop context switching MSR_IA32_UMWAIT_CONTROL 2020-06-22 20:54:57 -04:00
vmware.c Have vmware guests skip the refined TSC calibration when the TSC 2021-04-26 09:13:43 -07:00
zhaoxin.c x86/cpu: Reinitialize IA32_FEAT_CTL MSR on BSP during wakeup 2020-06-15 14:18:37 +02:00