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![Greg Kroah-Hartman](/assets/img/avatar_default.png)
============ *) Add driver for USB PHYs on sun9i *) Add driver for USB PHY on dm816x *) Modified exynos5-usbdrd driver to add support for Exynos5433 SoC Fixes ===== *) Fix power_on/power_off failure paths in some drivers *) Make miphy365x use generic PHY type constants *) Fix build errors due to missing export symbols in qcom-ufs driver *) Make all the functions return proper error values Cleanups ======== *) use PTR_ERR_OR_ZERO to simplify code *) use devm_kcalloc instead of devm_kzalloc with multiply *) remove un-necessary ifdef CONFIG_OF -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJVHrrMAAoJEA5ceFyATYLZV8kP/074teM4HZMAqmUVRG+nRr8b Eb8QYOzpnazUKtUovMYePzLjIZ3kvlMepSVVZiZqP6Uc2s6bnhTUN758HZBTdMVO Cer63lcp5eM6yBSIL4kNo3+18ikql3LJK9kQZoLGszZmVJzwwqhL/cWxl8+WfZ+P U71ciL07xmQD1c1GbRsuDBykaDKnf4M9HVUzP9w/pFANKYWWHdR3bj53kz9W7bGm gF/6wVFfxkknPfQjlqo9VUoSPN3P+WIcoM2rPG1b1u2adAAKFSYvXX2eJKWZF6Cz L9IZn1bTB0tMkrbswpMRqPtKjfmGyi1Acx8jt8WVA5pjNZ4K2P+9T7vsWifEnYa/ BDYdJJRzZSL89m9zwEFvLF490pTJrk33eFbqzHDGmDcdtj8KY8XZ9Fp5R2Lmj26s mtST0Pi+j9SGg95KZBcXd2l1EJmdDutEYy7LgVvkLk4IFPfOyaAFEhSNW+Qi+Lh9 SkDqbZUrk9ZxzsWqYJW5LVbQlscJ2NzQuf5AgkrXsufXO0B8RAV5bt0f88ENmQsJ rbbbWIb/ljT6YbZqT8z2X8T0PNZBknSfepb5LO5QAZMMJJm2202TondsISytvC9U fS5sBIDzuiiMtOA9FwA5Yl1bPWq6QY4OwqIMX3LAs10ylJhbuqJ7nK5qH3O4bpk+ DzOCd1oLJhXjnOXIujz2 =0gB+ -----END PGP SIGNATURE----- Merge tag 'for-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-next Kishon writes: New Features ============ *) Add driver for USB PHYs on sun9i *) Add driver for USB PHY on dm816x *) Modified exynos5-usbdrd driver to add support for Exynos5433 SoC Fixes ===== *) Fix power_on/power_off failure paths in some drivers *) Make miphy365x use generic PHY type constants *) Fix build errors due to missing export symbols in qcom-ufs driver *) Make all the functions return proper error values Cleanups ======== *) use PTR_ERR_OR_ZERO to simplify code *) use devm_kcalloc instead of devm_kzalloc with multiply *) remove un-necessary ifdef CONFIG_OF
360 lines
9.5 KiB
C
360 lines
9.5 KiB
C
/*
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* omap-control-phy.c - The PHY part of control module.
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*
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* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* Author: Kishon Vijay Abraham I <kishon@ti.com>
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/clk.h>
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#include <linux/phy/omap_control_phy.h>
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/**
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* omap_control_pcie_pcs - set the PCS delay count
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* @dev: the control module device
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* @delay: 8 bit delay value
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*/
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void omap_control_pcie_pcs(struct device *dev, u8 delay)
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{
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u32 val;
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struct omap_control_phy *control_phy;
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if (IS_ERR(dev) || !dev) {
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pr_err("%s: invalid device\n", __func__);
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return;
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}
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control_phy = dev_get_drvdata(dev);
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if (!control_phy) {
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dev_err(dev, "%s: invalid control phy device\n", __func__);
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return;
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}
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if (control_phy->type != OMAP_CTRL_TYPE_PCIE) {
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dev_err(dev, "%s: unsupported operation\n", __func__);
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return;
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}
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val = readl(control_phy->pcie_pcs);
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val &= ~(OMAP_CTRL_PCIE_PCS_MASK <<
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OMAP_CTRL_PCIE_PCS_DELAY_COUNT_SHIFT);
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val |= (delay << OMAP_CTRL_PCIE_PCS_DELAY_COUNT_SHIFT);
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writel(val, control_phy->pcie_pcs);
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}
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EXPORT_SYMBOL_GPL(omap_control_pcie_pcs);
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/**
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* omap_control_phy_power - power on/off the phy using control module reg
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* @dev: the control module device
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* @on: 0 or 1, based on powering on or off the PHY
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*/
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void omap_control_phy_power(struct device *dev, int on)
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{
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u32 val;
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unsigned long rate;
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struct omap_control_phy *control_phy;
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if (IS_ERR(dev) || !dev) {
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pr_err("%s: invalid device\n", __func__);
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return;
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}
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control_phy = dev_get_drvdata(dev);
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if (!control_phy) {
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dev_err(dev, "%s: invalid control phy device\n", __func__);
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return;
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}
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if (control_phy->type == OMAP_CTRL_TYPE_OTGHS)
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return;
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val = readl(control_phy->power);
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switch (control_phy->type) {
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case OMAP_CTRL_TYPE_USB2:
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if (on)
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val &= ~OMAP_CTRL_DEV_PHY_PD;
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else
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val |= OMAP_CTRL_DEV_PHY_PD;
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break;
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case OMAP_CTRL_TYPE_PCIE:
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case OMAP_CTRL_TYPE_PIPE3:
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rate = clk_get_rate(control_phy->sys_clk);
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rate = rate/1000000;
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if (on) {
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val &= ~(OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK |
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OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_MASK);
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val |= OMAP_CTRL_PIPE3_PHY_TX_RX_POWERON <<
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OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT;
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val |= rate <<
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OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT;
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} else {
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val &= ~OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK;
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val |= OMAP_CTRL_PIPE3_PHY_TX_RX_POWEROFF <<
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OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT;
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}
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break;
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case OMAP_CTRL_TYPE_DRA7USB2:
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if (on)
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val &= ~OMAP_CTRL_USB2_PHY_PD;
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else
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val |= OMAP_CTRL_USB2_PHY_PD;
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break;
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case OMAP_CTRL_TYPE_AM437USB2:
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if (on) {
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val &= ~(AM437X_CTRL_USB2_PHY_PD |
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AM437X_CTRL_USB2_OTG_PD);
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val |= (AM437X_CTRL_USB2_OTGVDET_EN |
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AM437X_CTRL_USB2_OTGSESSEND_EN);
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} else {
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val &= ~(AM437X_CTRL_USB2_OTGVDET_EN |
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AM437X_CTRL_USB2_OTGSESSEND_EN);
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val |= (AM437X_CTRL_USB2_PHY_PD |
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AM437X_CTRL_USB2_OTG_PD);
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}
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break;
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default:
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dev_err(dev, "%s: type %d not recognized\n",
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__func__, control_phy->type);
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break;
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}
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writel(val, control_phy->power);
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}
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EXPORT_SYMBOL_GPL(omap_control_phy_power);
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/**
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* omap_control_usb_host_mode - set AVALID, VBUSVALID and ID pin in grounded
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* @ctrl_phy: struct omap_control_phy *
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*
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* Writes to the mailbox register to notify the usb core that a usb
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* device has been connected.
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*/
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static void omap_control_usb_host_mode(struct omap_control_phy *ctrl_phy)
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{
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u32 val;
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val = readl(ctrl_phy->otghs_control);
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val &= ~(OMAP_CTRL_DEV_IDDIG | OMAP_CTRL_DEV_SESSEND);
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val |= OMAP_CTRL_DEV_AVALID | OMAP_CTRL_DEV_VBUSVALID;
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writel(val, ctrl_phy->otghs_control);
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}
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/**
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* omap_control_usb_device_mode - set AVALID, VBUSVALID and ID pin in high
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* impedance
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* @ctrl_phy: struct omap_control_phy *
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*
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* Writes to the mailbox register to notify the usb core that it has been
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* connected to a usb host.
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*/
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static void omap_control_usb_device_mode(struct omap_control_phy *ctrl_phy)
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{
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u32 val;
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val = readl(ctrl_phy->otghs_control);
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val &= ~OMAP_CTRL_DEV_SESSEND;
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val |= OMAP_CTRL_DEV_IDDIG | OMAP_CTRL_DEV_AVALID |
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OMAP_CTRL_DEV_VBUSVALID;
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writel(val, ctrl_phy->otghs_control);
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}
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/**
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* omap_control_usb_set_sessionend - Enable SESSIONEND and IDIG to high
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* impedance
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* @ctrl_phy: struct omap_control_phy *
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*
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* Writes to the mailbox register to notify the usb core it's now in
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* disconnected state.
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*/
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static void omap_control_usb_set_sessionend(struct omap_control_phy *ctrl_phy)
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{
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u32 val;
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val = readl(ctrl_phy->otghs_control);
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val &= ~(OMAP_CTRL_DEV_AVALID | OMAP_CTRL_DEV_VBUSVALID);
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val |= OMAP_CTRL_DEV_IDDIG | OMAP_CTRL_DEV_SESSEND;
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writel(val, ctrl_phy->otghs_control);
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}
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/**
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* omap_control_usb_set_mode - Calls to functions to set USB in one of host mode
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* or device mode or to denote disconnected state
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* @dev: the control module device
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* @mode: The mode to which usb should be configured
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*
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* This is an API to write to the mailbox register to notify the usb core that
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* a usb device has been connected.
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*/
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void omap_control_usb_set_mode(struct device *dev,
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enum omap_control_usb_mode mode)
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{
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struct omap_control_phy *ctrl_phy;
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if (IS_ERR(dev) || !dev)
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return;
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ctrl_phy = dev_get_drvdata(dev);
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if (!ctrl_phy) {
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dev_err(dev, "Invalid control phy device\n");
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return;
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}
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if (ctrl_phy->type != OMAP_CTRL_TYPE_OTGHS)
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return;
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switch (mode) {
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case USB_MODE_HOST:
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omap_control_usb_host_mode(ctrl_phy);
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break;
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case USB_MODE_DEVICE:
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omap_control_usb_device_mode(ctrl_phy);
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break;
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case USB_MODE_DISCONNECT:
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omap_control_usb_set_sessionend(ctrl_phy);
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break;
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default:
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dev_vdbg(dev, "invalid omap control usb mode\n");
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}
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}
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EXPORT_SYMBOL_GPL(omap_control_usb_set_mode);
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static const enum omap_control_phy_type otghs_data = OMAP_CTRL_TYPE_OTGHS;
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static const enum omap_control_phy_type usb2_data = OMAP_CTRL_TYPE_USB2;
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static const enum omap_control_phy_type pipe3_data = OMAP_CTRL_TYPE_PIPE3;
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static const enum omap_control_phy_type pcie_data = OMAP_CTRL_TYPE_PCIE;
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static const enum omap_control_phy_type dra7usb2_data = OMAP_CTRL_TYPE_DRA7USB2;
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static const enum omap_control_phy_type am437usb2_data = OMAP_CTRL_TYPE_AM437USB2;
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static const struct of_device_id omap_control_phy_id_table[] = {
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{
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.compatible = "ti,control-phy-otghs",
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.data = &otghs_data,
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},
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{
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.compatible = "ti,control-phy-usb2",
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.data = &usb2_data,
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},
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{
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.compatible = "ti,control-phy-pipe3",
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.data = &pipe3_data,
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},
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{
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.compatible = "ti,control-phy-pcie",
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.data = &pcie_data,
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},
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{
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.compatible = "ti,control-phy-usb2-dra7",
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.data = &dra7usb2_data,
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},
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{
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.compatible = "ti,control-phy-usb2-am437",
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.data = &am437usb2_data,
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},
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{},
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};
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MODULE_DEVICE_TABLE(of, omap_control_phy_id_table);
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static int omap_control_phy_probe(struct platform_device *pdev)
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{
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struct resource *res;
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const struct of_device_id *of_id;
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struct omap_control_phy *control_phy;
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of_id = of_match_device(omap_control_phy_id_table, &pdev->dev);
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if (!of_id)
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return -EINVAL;
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control_phy = devm_kzalloc(&pdev->dev, sizeof(*control_phy),
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GFP_KERNEL);
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if (!control_phy)
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return -ENOMEM;
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control_phy->dev = &pdev->dev;
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control_phy->type = *(enum omap_control_phy_type *)of_id->data;
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if (control_phy->type == OMAP_CTRL_TYPE_OTGHS) {
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
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"otghs_control");
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control_phy->otghs_control = devm_ioremap_resource(
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&pdev->dev, res);
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if (IS_ERR(control_phy->otghs_control))
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return PTR_ERR(control_phy->otghs_control);
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} else {
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
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"power");
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control_phy->power = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(control_phy->power)) {
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dev_err(&pdev->dev, "Couldn't get power register\n");
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return PTR_ERR(control_phy->power);
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}
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}
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if (control_phy->type == OMAP_CTRL_TYPE_PIPE3 ||
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control_phy->type == OMAP_CTRL_TYPE_PCIE) {
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control_phy->sys_clk = devm_clk_get(control_phy->dev,
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"sys_clkin");
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if (IS_ERR(control_phy->sys_clk)) {
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pr_err("%s: unable to get sys_clkin\n", __func__);
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return -EINVAL;
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}
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}
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if (control_phy->type == OMAP_CTRL_TYPE_PCIE) {
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
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"pcie_pcs");
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control_phy->pcie_pcs = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(control_phy->pcie_pcs))
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return PTR_ERR(control_phy->pcie_pcs);
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}
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dev_set_drvdata(control_phy->dev, control_phy);
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return 0;
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}
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static struct platform_driver omap_control_phy_driver = {
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.probe = omap_control_phy_probe,
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.driver = {
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.name = "omap-control-phy",
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.of_match_table = omap_control_phy_id_table,
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},
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};
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static int __init omap_control_phy_init(void)
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{
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return platform_driver_register(&omap_control_phy_driver);
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}
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subsys_initcall(omap_control_phy_init);
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static void __exit omap_control_phy_exit(void)
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{
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platform_driver_unregister(&omap_control_phy_driver);
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}
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module_exit(omap_control_phy_exit);
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MODULE_ALIAS("platform:omap_control_phy");
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MODULE_AUTHOR("Texas Instruments Inc.");
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MODULE_DESCRIPTION("OMAP Control Module PHY Driver");
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MODULE_LICENSE("GPL v2");
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