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b24413180f
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
190 lines
7.9 KiB
C
190 lines
7.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Analog Devices 1889 audio driver
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* Copyright (C) 2004, Kyle McMartin <kyle@parisc-linux.org>
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*/
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#ifndef __AD1889_H__
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#define __AD1889_H__
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#define AD_DS_WSMC 0x00 /* wave/synthesis channel mixer control */
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#define AD_DS_WSMC_SYEN 0x0004 /* synthesis channel enable */
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#define AD_DS_WSMC_SYRQ 0x0030 /* synth. fifo request point */
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#define AD_DS_WSMC_WA16 0x0100 /* wave channel 16bit select */
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#define AD_DS_WSMC_WAST 0x0200 /* wave channel stereo select */
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#define AD_DS_WSMC_WAEN 0x0400 /* wave channel enable */
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#define AD_DS_WSMC_WARQ 0x3000 /* wave fifo request point */
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#define AD_DS_RAMC 0x02 /* resampler/ADC channel mixer control */
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#define AD_DS_RAMC_AD16 0x0001 /* ADC channel 16bit select */
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#define AD_DS_RAMC_ADST 0x0002 /* ADC channel stereo select */
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#define AD_DS_RAMC_ADEN 0x0004 /* ADC channel enable */
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#define AD_DS_RAMC_ACRQ 0x0030 /* ADC fifo request point */
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#define AD_DS_RAMC_REEN 0x0400 /* resampler channel enable */
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#define AD_DS_RAMC_RERQ 0x3000 /* res. fifo request point */
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#define AD_DS_WADA 0x04 /* wave channel mix attenuation */
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#define AD_DS_WADA_RWAM 0x0080 /* right wave mute */
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#define AD_DS_WADA_RWAA 0x001f /* right wave attenuation */
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#define AD_DS_WADA_LWAM 0x8000 /* left wave mute */
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#define AD_DS_WADA_LWAA 0x3e00 /* left wave attenuation */
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#define AD_DS_SYDA 0x06 /* synthesis channel mix attenuation */
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#define AD_DS_SYDA_RSYM 0x0080 /* right synthesis mute */
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#define AD_DS_SYDA_RSYA 0x001f /* right synthesis attenuation */
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#define AD_DS_SYDA_LSYM 0x8000 /* left synthesis mute */
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#define AD_DS_SYDA_LSYA 0x3e00 /* left synthesis attenuation */
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#define AD_DS_WAS 0x08 /* wave channel sample rate */
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#define AD_DS_WAS_WAS 0xffff /* sample rate mask */
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#define AD_DS_RES 0x0a /* resampler channel sample rate */
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#define AD_DS_RES_RES 0xffff /* sample rate mask */
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#define AD_DS_CCS 0x0c /* chip control/status */
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#define AD_DS_CCS_ADO 0x0001 /* ADC channel overflow */
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#define AD_DS_CCS_REO 0x0002 /* resampler channel overflow */
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#define AD_DS_CCS_SYU 0x0004 /* synthesis channel underflow */
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#define AD_DS_CCS_WAU 0x0008 /* wave channel underflow */
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/* bits 4 -> 7, 9, 11 -> 14 reserved */
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#define AD_DS_CCS_XTD 0x0100 /* xtd delay control (4096 clock cycles) */
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#define AD_DS_CCS_PDALL 0x0400 /* power */
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#define AD_DS_CCS_CLKEN 0x8000 /* clock */
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#define AD_DMA_RESBA 0x40 /* RES base address */
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#define AD_DMA_RESCA 0x44 /* RES current address */
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#define AD_DMA_RESBC 0x48 /* RES base count */
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#define AD_DMA_RESCC 0x4c /* RES current count */
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#define AD_DMA_ADCBA 0x50 /* ADC base address */
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#define AD_DMA_ADCCA 0x54 /* ADC current address */
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#define AD_DMA_ADCBC 0x58 /* ADC base count */
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#define AD_DMA_ADCCC 0x5c /* ADC current count */
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#define AD_DMA_SYNBA 0x60 /* synth base address */
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#define AD_DMA_SYNCA 0x64 /* synth current address */
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#define AD_DMA_SYNBC 0x68 /* synth base count */
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#define AD_DMA_SYNCC 0x6c /* synth current count */
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#define AD_DMA_WAVBA 0x70 /* wave base address */
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#define AD_DMA_WAVCA 0x74 /* wave current address */
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#define AD_DMA_WAVBC 0x78 /* wave base count */
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#define AD_DMA_WAVCC 0x7c /* wave current count */
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#define AD_DMA_RESIC 0x80 /* RES dma interrupt current byte count */
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#define AD_DMA_RESIB 0x84 /* RES dma interrupt base byte count */
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#define AD_DMA_ADCIC 0x88 /* ADC dma interrupt current byte count */
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#define AD_DMA_ADCIB 0x8c /* ADC dma interrupt base byte count */
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#define AD_DMA_SYNIC 0x90 /* synth dma interrupt current byte count */
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#define AD_DMA_SYNIB 0x94 /* synth dma interrupt base byte count */
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#define AD_DMA_WAVIC 0x98 /* wave dma interrupt current byte count */
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#define AD_DMA_WAVIB 0x9c /* wave dma interrupt base byte count */
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#define AD_DMA_ICC 0xffffff /* current byte count mask */
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#define AD_DMA_IBC 0xffffff /* base byte count mask */
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/* bits 24 -> 31 reserved */
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/* 4 bytes pad */
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#define AD_DMA_ADC 0xa8 /* ADC dma control and status */
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#define AD_DMA_SYNTH 0xb0 /* Synth dma control and status */
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#define AD_DMA_WAV 0xb8 /* wave dma control and status */
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#define AD_DMA_RES 0xa0 /* Resample dma control and status */
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#define AD_DMA_SGDE 0x0001 /* SGD mode enable */
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#define AD_DMA_LOOP 0x0002 /* loop enable */
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#define AD_DMA_IM 0x000c /* interrupt mode mask */
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#define AD_DMA_IM_DIS (~AD_DMA_IM) /* disable */
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#define AD_DMA_IM_CNT 0x0004 /* interrupt on count */
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#define AD_DMA_IM_SGD 0x0008 /* interrupt on SGD flag */
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#define AD_DMA_IM_EOL 0x000c /* interrupt on End of Linked List */
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#define AD_DMA_SGDS 0x0030 /* SGD status */
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#define AD_DMA_SFLG 0x0040 /* SGD flag */
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#define AD_DMA_EOL 0x0080 /* SGD end of list */
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/* bits 8 -> 15 reserved */
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#define AD_DMA_DISR 0xc0 /* dma interrupt status */
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#define AD_DMA_DISR_RESI 0x000001 /* resampler channel interrupt */
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#define AD_DMA_DISR_ADCI 0x000002 /* ADC channel interrupt */
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#define AD_DMA_DISR_SYNI 0x000004 /* synthesis channel interrupt */
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#define AD_DMA_DISR_WAVI 0x000008 /* wave channel interrupt */
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/* bits 4, 5 reserved */
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#define AD_DMA_DISR_SEPS 0x000040 /* serial eeprom status */
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/* bits 7 -> 13 reserved */
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#define AD_DMA_DISR_PMAI 0x004000 /* pci master abort interrupt */
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#define AD_DMA_DISR_PTAI 0x008000 /* pci target abort interrupt */
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#define AD_DMA_DISR_PTAE 0x010000 /* pci target abort interrupt enable */
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#define AD_DMA_DISR_PMAE 0x020000 /* pci master abort interrupt enable */
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/* bits 19 -> 31 reserved */
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/* interrupt mask */
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#define AD_INTR_MASK (AD_DMA_DISR_RESI|AD_DMA_DISR_ADCI| \
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AD_DMA_DISR_WAVI|AD_DMA_DISR_SYNI| \
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AD_DMA_DISR_PMAI|AD_DMA_DISR_PTAI)
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#define AD_DMA_CHSS 0xc4 /* dma channel stop status */
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#define AD_DMA_CHSS_RESS 0x000001 /* resampler channel stopped */
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#define AD_DMA_CHSS_ADCS 0x000002 /* ADC channel stopped */
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#define AD_DMA_CHSS_SYNS 0x000004 /* synthesis channel stopped */
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#define AD_DMA_CHSS_WAVS 0x000008 /* wave channel stopped */
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#define AD_GPIO_IPC 0xc8 /* gpio port control */
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#define AD_GPIO_OP 0xca /* gpio output port status */
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#define AD_GPIO_IP 0xcc /* gpio input port status */
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#define AD_AC97_BASE 0x100 /* ac97 base register */
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#define AD_AC97_RESET 0x100 /* reset */
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#define AD_AC97_PWR_CTL 0x126 /* == AC97_POWERDOWN */
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#define AD_AC97_PWR_ADC 0x0001 /* ADC ready status */
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#define AD_AC97_PWR_DAC 0x0002 /* DAC ready status */
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#define AD_AC97_PWR_PR0 0x0100 /* PR0 (ADC) powerdown */
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#define AD_AC97_PWR_PR1 0x0200 /* PR1 (DAC) powerdown */
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#define AD_MISC_CTL 0x176 /* misc control */
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#define AD_MISC_CTL_DACZ 0x8000 /* set for zero fill, unset for repeat */
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#define AD_MISC_CTL_ARSR 0x0001 /* set for SR1, unset for SR0 */
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#define AD_MISC_CTL_ALSR 0x0100
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#define AD_MISC_CTL_DLSR 0x0400
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#define AD_MISC_CTL_DRSR 0x0004
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#define AD_AC97_SR0 0x178 /* sample rate 0, 0xbb80 == 48K */
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#define AD_AC97_SR0_48K 0xbb80 /* 48KHz */
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#define AD_AC97_SR1 0x17a /* sample rate 1 */
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#define AD_AC97_ACIC 0x180 /* ac97 codec interface control */
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#define AD_AC97_ACIC_ACIE 0x0001 /* analog codec interface enable */
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#define AD_AC97_ACIC_ACRD 0x0002 /* analog codec reset disable */
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#define AD_AC97_ACIC_ASOE 0x0004 /* audio stream output enable */
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#define AD_AC97_ACIC_VSRM 0x0008 /* variable sample rate mode */
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#define AD_AC97_ACIC_FSDH 0x0100 /* force SDATA_OUT high */
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#define AD_AC97_ACIC_FSYH 0x0200 /* force sync high */
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#define AD_AC97_ACIC_ACRDY 0x8000 /* analog codec ready status */
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/* bits 10 -> 14 reserved */
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#define AD_DS_MEMSIZE 512
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#define AD_OPL_MEMSIZE 16
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#define AD_MIDI_MEMSIZE 16
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#define AD_WAV_STATE 0
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#define AD_ADC_STATE 1
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#define AD_MAX_STATES 2
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#define AD_CHAN_WAV 0x0001
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#define AD_CHAN_ADC 0x0002
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#define AD_CHAN_RES 0x0004
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#define AD_CHAN_SYN 0x0008
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/* The chip would support 4 GB buffers and 16 MB periods,
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* but let's not overdo it ... */
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#define BUFFER_BYTES_MAX (256 * 1024)
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#define PERIOD_BYTES_MIN 32
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#define PERIOD_BYTES_MAX (BUFFER_BYTES_MAX / 2)
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#define PERIODS_MIN 2
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#define PERIODS_MAX (BUFFER_BYTES_MAX / PERIOD_BYTES_MIN)
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#endif /* __AD1889_H__ */
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