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![Alan Stern](/assets/img/avatar_default.png)
This patch (as1564c) converts the EHCI platform drivers to use the central ehci_setup() routine for generic controller initialization rather than each having its own idiosyncratic approach. The major point of difficulty lies in ehci-pci's many vendor- and device-specific workarounds. Some of them have to be applied before calling ehci_setup() and some after, which necessitates a fair amount of code motion. The other platform drivers require much smaller changes. One point not addressed by the patch is whether ports should be powered on or off following initialization. The different drivers appear to handle this pretty much at random. In fact it shouldn't matter, because the hub driver turns on power to all ports when it binds to the root hub. Straightening that out will be left for another day. Signed-off-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
203 lines
4.3 KiB
C
203 lines
4.3 KiB
C
/*
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* EHCI HCD glue for Cavium Octeon II SOCs.
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*
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* Loosely based on ehci-au1xxx.c
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2010 Cavium Networks
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*
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*/
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#include <linux/platform_device.h>
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#include <asm/octeon/octeon.h>
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#include <asm/octeon/cvmx-uctlx-defs.h>
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#define OCTEON_EHCI_HCD_NAME "octeon-ehci"
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/* Common clock init code. */
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void octeon2_usb_clocks_start(void);
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void octeon2_usb_clocks_stop(void);
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static void ehci_octeon_start(void)
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{
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union cvmx_uctlx_ehci_ctl ehci_ctl;
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octeon2_usb_clocks_start();
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ehci_ctl.u64 = cvmx_read_csr(CVMX_UCTLX_EHCI_CTL(0));
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/* Use 64-bit addressing. */
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ehci_ctl.s.ehci_64b_addr_en = 1;
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ehci_ctl.s.l2c_addr_msb = 0;
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ehci_ctl.s.l2c_buff_emod = 1; /* Byte swapped. */
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ehci_ctl.s.l2c_desc_emod = 1; /* Byte swapped. */
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cvmx_write_csr(CVMX_UCTLX_EHCI_CTL(0), ehci_ctl.u64);
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}
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static void ehci_octeon_stop(void)
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{
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octeon2_usb_clocks_stop();
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}
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static const struct hc_driver ehci_octeon_hc_driver = {
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.description = hcd_name,
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.product_desc = "Octeon EHCI",
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.hcd_priv_size = sizeof(struct ehci_hcd),
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/*
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* generic hardware linkage
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*/
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.irq = ehci_irq,
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.flags = HCD_MEMORY | HCD_USB2,
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/*
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* basic lifecycle operations
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*/
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.reset = ehci_setup,
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.start = ehci_run,
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.stop = ehci_stop,
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.shutdown = ehci_shutdown,
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/*
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* managing i/o requests and associated device resources
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*/
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.urb_enqueue = ehci_urb_enqueue,
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.urb_dequeue = ehci_urb_dequeue,
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.endpoint_disable = ehci_endpoint_disable,
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.endpoint_reset = ehci_endpoint_reset,
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/*
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* scheduling support
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*/
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.get_frame_number = ehci_get_frame,
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/*
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* root hub support
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*/
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.hub_status_data = ehci_hub_status_data,
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.hub_control = ehci_hub_control,
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.bus_suspend = ehci_bus_suspend,
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.bus_resume = ehci_bus_resume,
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.relinquish_port = ehci_relinquish_port,
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.port_handed_over = ehci_port_handed_over,
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.clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
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};
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static u64 ehci_octeon_dma_mask = DMA_BIT_MASK(64);
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static int ehci_octeon_drv_probe(struct platform_device *pdev)
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{
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struct usb_hcd *hcd;
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struct ehci_hcd *ehci;
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struct resource *res_mem;
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int irq;
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int ret;
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if (usb_disabled())
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return -ENODEV;
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irq = platform_get_irq(pdev, 0);
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if (irq < 0) {
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dev_err(&pdev->dev, "No irq assigned\n");
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return -ENODEV;
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}
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res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (res_mem == NULL) {
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dev_err(&pdev->dev, "No register space assigned\n");
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return -ENODEV;
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}
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/*
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* We can DMA from anywhere. But the descriptors must be in
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* the lower 4GB.
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*/
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pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
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pdev->dev.dma_mask = &ehci_octeon_dma_mask;
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hcd = usb_create_hcd(&ehci_octeon_hc_driver, &pdev->dev, "octeon");
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if (!hcd)
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return -ENOMEM;
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hcd->rsrc_start = res_mem->start;
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hcd->rsrc_len = resource_size(res_mem);
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if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len,
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OCTEON_EHCI_HCD_NAME)) {
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dev_err(&pdev->dev, "request_mem_region failed\n");
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ret = -EBUSY;
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goto err1;
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}
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hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
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if (!hcd->regs) {
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dev_err(&pdev->dev, "ioremap failed\n");
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ret = -ENOMEM;
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goto err2;
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}
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ehci_octeon_start();
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ehci = hcd_to_ehci(hcd);
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/* Octeon EHCI matches CPU endianness. */
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#ifdef __BIG_ENDIAN
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ehci->big_endian_mmio = 1;
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#endif
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ehci->caps = hcd->regs;
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ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
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if (ret) {
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dev_dbg(&pdev->dev, "failed to add hcd with err %d\n", ret);
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goto err3;
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}
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platform_set_drvdata(pdev, hcd);
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/* root ports should always stay powered */
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ehci_port_power(ehci, 1);
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return 0;
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err3:
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ehci_octeon_stop();
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iounmap(hcd->regs);
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err2:
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release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
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err1:
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usb_put_hcd(hcd);
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return ret;
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}
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static int ehci_octeon_drv_remove(struct platform_device *pdev)
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{
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struct usb_hcd *hcd = platform_get_drvdata(pdev);
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usb_remove_hcd(hcd);
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ehci_octeon_stop();
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iounmap(hcd->regs);
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release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
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usb_put_hcd(hcd);
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platform_set_drvdata(pdev, NULL);
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return 0;
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}
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static struct platform_driver ehci_octeon_driver = {
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.probe = ehci_octeon_drv_probe,
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.remove = ehci_octeon_drv_remove,
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.shutdown = usb_hcd_platform_shutdown,
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.driver = {
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.name = OCTEON_EHCI_HCD_NAME,
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.owner = THIS_MODULE,
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}
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};
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MODULE_ALIAS("platform:" OCTEON_EHCI_HCD_NAME);
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