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![Tony Lindgren](/assets/img/avatar_default.png)
With the omap1 SPARSE_IRQ changes mach/irqs.h is no longer automatically included. Turns out now we rely on ARCH_OMAP15XX including hardware.h from memory.h, so without ARCH_OMAP15XX we get build failures. As we have legacy drivers still relying on these indirect includes, let's not add more mach includes to the drivers. Those have to be removed anyways for multiplatform support. Let's fix up mach-omap1 to include soc.h where cpu_is_omap checks are done, and common.h for board-*.c files. But let's keep the indirect memory.h include for now to avoid unnecessary churn in the drivers. Signed-off-by: Tony Lindgren <tony@atomide.com>
263 lines
6.1 KiB
C
263 lines
6.1 KiB
C
/*
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* linux/arch/arm/mach-omap1/serial.c
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*
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* OMAP1 serial support.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/gpio.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/delay.h>
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#include <linux/serial.h>
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#include <linux/tty.h>
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#include <linux/serial_8250.h>
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#include <linux/serial_reg.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <asm/mach-types.h>
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#include <mach/mux.h>
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#include "pm.h"
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#include "soc.h"
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static struct clk * uart1_ck;
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static struct clk * uart2_ck;
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static struct clk * uart3_ck;
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static inline unsigned int omap_serial_in(struct plat_serial8250_port *up,
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int offset)
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{
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offset <<= up->regshift;
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return (unsigned int)__raw_readb(up->membase + offset);
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}
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static inline void omap_serial_outp(struct plat_serial8250_port *p, int offset,
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int value)
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{
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offset <<= p->regshift;
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__raw_writeb(value, p->membase + offset);
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}
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/*
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* Internal UARTs need to be initialized for the 8250 autoconfig to work
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* properly. Note that the TX watermark initialization may not be needed
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* once the 8250.c watermark handling code is merged.
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*/
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static void __init omap_serial_reset(struct plat_serial8250_port *p)
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{
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omap_serial_outp(p, UART_OMAP_MDR1,
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UART_OMAP_MDR1_DISABLE); /* disable UART */
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omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */
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omap_serial_outp(p, UART_OMAP_MDR1,
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UART_OMAP_MDR1_16X_MODE); /* enable UART */
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if (!cpu_is_omap15xx()) {
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omap_serial_outp(p, UART_OMAP_SYSC, 0x01);
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while (!(omap_serial_in(p, UART_OMAP_SYSC) & 0x01));
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}
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}
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static struct plat_serial8250_port serial_platform_data[] = {
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{
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.mapbase = OMAP1_UART1_BASE,
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.irq = INT_UART1,
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.flags = UPF_BOOT_AUTOCONF,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = OMAP16XX_BASE_BAUD * 16,
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},
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{
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.mapbase = OMAP1_UART2_BASE,
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.irq = INT_UART2,
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.flags = UPF_BOOT_AUTOCONF,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = OMAP16XX_BASE_BAUD * 16,
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},
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{
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.mapbase = OMAP1_UART3_BASE,
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.irq = INT_UART3,
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.flags = UPF_BOOT_AUTOCONF,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = OMAP16XX_BASE_BAUD * 16,
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},
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{ },
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};
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static struct platform_device serial_device = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev = {
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.platform_data = serial_platform_data,
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},
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};
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/*
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* Note that on Innovator-1510 UART2 pins conflict with USB2.
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* By default UART2 does not work on Innovator-1510 if you have
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* USB OHCI enabled. To use UART2, you must disable USB2 first.
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*/
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void __init omap_serial_init(void)
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{
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int i;
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if (cpu_is_omap7xx()) {
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serial_platform_data[0].regshift = 0;
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serial_platform_data[1].regshift = 0;
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serial_platform_data[0].irq = INT_7XX_UART_MODEM_1;
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serial_platform_data[1].irq = INT_7XX_UART_MODEM_IRDA_2;
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}
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if (cpu_is_omap15xx()) {
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serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16;
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serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16;
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serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16;
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}
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for (i = 0; i < ARRAY_SIZE(serial_platform_data) - 1; i++) {
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/* Don't look at UARTs higher than 2 for omap7xx */
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if (cpu_is_omap7xx() && i > 1) {
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serial_platform_data[i].membase = NULL;
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serial_platform_data[i].mapbase = 0;
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continue;
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}
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/* Static mapping, never released */
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serial_platform_data[i].membase =
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ioremap(serial_platform_data[i].mapbase, SZ_2K);
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if (!serial_platform_data[i].membase) {
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printk(KERN_ERR "Could not ioremap uart%i\n", i);
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continue;
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}
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switch (i) {
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case 0:
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uart1_ck = clk_get(NULL, "uart1_ck");
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if (IS_ERR(uart1_ck))
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printk("Could not get uart1_ck\n");
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else {
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clk_enable(uart1_ck);
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if (cpu_is_omap15xx())
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clk_set_rate(uart1_ck, 12000000);
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}
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break;
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case 1:
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uart2_ck = clk_get(NULL, "uart2_ck");
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if (IS_ERR(uart2_ck))
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printk("Could not get uart2_ck\n");
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else {
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clk_enable(uart2_ck);
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if (cpu_is_omap15xx())
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clk_set_rate(uart2_ck, 12000000);
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else
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clk_set_rate(uart2_ck, 48000000);
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}
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break;
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case 2:
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uart3_ck = clk_get(NULL, "uart3_ck");
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if (IS_ERR(uart3_ck))
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printk("Could not get uart3_ck\n");
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else {
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clk_enable(uart3_ck);
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if (cpu_is_omap15xx())
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clk_set_rate(uart3_ck, 12000000);
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}
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break;
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}
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omap_serial_reset(&serial_platform_data[i]);
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}
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}
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#ifdef CONFIG_OMAP_SERIAL_WAKE
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static irqreturn_t omap_serial_wake_interrupt(int irq, void *dev_id)
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{
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/* Need to do something with serial port right after wake-up? */
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return IRQ_HANDLED;
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}
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/*
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* Reroutes serial RX lines to GPIO lines for the duration of
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* sleep to allow waking up the device from serial port even
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* in deep sleep.
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*/
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void omap_serial_wake_trigger(int enable)
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{
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if (!cpu_is_omap16xx())
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return;
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if (uart1_ck != NULL) {
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if (enable)
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omap_cfg_reg(V14_16XX_GPIO37);
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else
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omap_cfg_reg(V14_16XX_UART1_RX);
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}
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if (uart2_ck != NULL) {
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if (enable)
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omap_cfg_reg(R9_16XX_GPIO18);
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else
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omap_cfg_reg(R9_16XX_UART2_RX);
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}
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if (uart3_ck != NULL) {
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if (enable)
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omap_cfg_reg(L14_16XX_GPIO49);
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else
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omap_cfg_reg(L14_16XX_UART3_RX);
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}
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}
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static void __init omap_serial_set_port_wakeup(int gpio_nr)
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{
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int ret;
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ret = gpio_request(gpio_nr, "UART wake");
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if (ret < 0) {
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printk(KERN_ERR "Could not request UART wake GPIO: %i\n",
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gpio_nr);
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return;
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}
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gpio_direction_input(gpio_nr);
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ret = request_irq(gpio_to_irq(gpio_nr), &omap_serial_wake_interrupt,
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IRQF_TRIGGER_RISING, "serial wakeup", NULL);
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if (ret) {
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gpio_free(gpio_nr);
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printk(KERN_ERR "No interrupt for UART wake GPIO: %i\n",
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gpio_nr);
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return;
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}
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enable_irq_wake(gpio_to_irq(gpio_nr));
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}
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int __init omap_serial_wakeup_init(void)
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{
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if (!cpu_is_omap16xx())
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return 0;
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if (uart1_ck != NULL)
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omap_serial_set_port_wakeup(37);
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if (uart2_ck != NULL)
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omap_serial_set_port_wakeup(18);
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if (uart3_ck != NULL)
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omap_serial_set_port_wakeup(49);
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return 0;
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}
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#endif /* CONFIG_OMAP_SERIAL_WAKE */
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static int __init omap_init(void)
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{
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if (!cpu_class_is_omap1())
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return -ENODEV;
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return platform_device_register(&serial_device);
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}
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arch_initcall(omap_init);
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