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![Russell King](/assets/img/avatar_default.png)
All ARMv5 and older CPUs invalidate their caches in the early assembly setup function, prior to enabling the MMU. This is because the L1 cache should not contain any data relevant to the execution of the kernel at this point; all data should have been flushed out to memory. This requirement should also be true for ARMv6 and ARMv7 CPUs - indeed, these typically do not search their caches when caching is disabled (as it needs to be when the MMU is disabled) so this change should be safe. ARMv7 allows there to be CPUs which search their caches while caching is disabled, and it's permitted that the cache is uninitialised at boot; for these, the architecture reference manual requires that an implementation specific code sequence is used immediately after reset to ensure that the cache is placed into a sane state. Such functionality is definitely outside the remit of the Linux kernel, and must be done by the SoC's firmware before _any_ CPU gets to the Linux kernel. Changing the data cache clean+invalidate to a mere invalidate allows us to get rid of a lot of platform specific hacks around this issue for their secondary CPU bringup paths - some of which were buggy. Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Tested-by: Florian Fainelli <f.fainelli@gmail.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Wei Xu <xuwei5@hisilicon.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
47 lines
1.4 KiB
C
47 lines
1.4 KiB
C
#ifndef __ARCH_MACH_COMMON_H
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#define __ARCH_MACH_COMMON_H
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extern void shmobile_earlytimer_init(void);
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extern void shmobile_init_delay(void);
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struct twd_local_timer;
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extern void shmobile_setup_console(void);
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extern void shmobile_boot_vector(void);
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extern unsigned long shmobile_boot_fn;
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extern unsigned long shmobile_boot_arg;
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extern unsigned long shmobile_boot_size;
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extern void shmobile_smp_boot(void);
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extern void shmobile_smp_sleep(void);
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extern void shmobile_smp_hook(unsigned int cpu, unsigned long fn,
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unsigned long arg);
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extern int shmobile_smp_cpu_disable(unsigned int cpu);
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extern void shmobile_boot_scu(void);
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extern void shmobile_smp_scu_prepare_cpus(unsigned int max_cpus);
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extern void shmobile_smp_scu_cpu_die(unsigned int cpu);
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extern int shmobile_smp_scu_cpu_kill(unsigned int cpu);
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struct clk;
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extern int shmobile_clk_init(void);
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extern struct platform_suspend_ops shmobile_suspend_ops;
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#ifdef CONFIG_SUSPEND
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int shmobile_suspend_init(void);
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void shmobile_smp_apmu_suspend_init(void);
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#else
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static inline int shmobile_suspend_init(void) { return 0; }
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static inline void shmobile_smp_apmu_suspend_init(void) { }
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#endif
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#ifdef CONFIG_CPU_FREQ
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int shmobile_cpufreq_init(void);
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#else
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static inline int shmobile_cpufreq_init(void) { return 0; }
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#endif
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extern void __iomem *shmobile_scu_base;
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static inline void __init shmobile_init_late(void)
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{
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shmobile_suspend_init();
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shmobile_cpufreq_init();
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}
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#endif /* __ARCH_MACH_COMMON_H */
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