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61ca6ee782
__mtk_clk_simple_remove() and so also mtk_clk_simple_remove() return zero unconditionally. Make them return no value instead and convert the drivers making use of it to platform_driver's .remove_new(). This makes the semantics in the callers of mtk_clk_simple_remove() clearer and prepares for the quest to make platform driver's remove function return void. There is no semantic change. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20230430190233.878921-2-u.kleine-koenig@pengutronix.de Signed-off-by: Stephen Boyd <sboyd@kernel.org>
102 lines
3.1 KiB
C
102 lines
3.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2021 MediaTek Inc.
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* Author: Sam Shih <sam.shih@mediatek.com>
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* Author: Wenzhen Yu <wenzhen.yu@mediatek.com>
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*/
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#include <linux/clk-provider.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include "clk-mtk.h"
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#include "clk-gate.h"
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#include <dt-bindings/clock/mt7986-clk.h>
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static const struct mtk_gate_regs sgmii0_cg_regs = {
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.set_ofs = 0xe4,
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.clr_ofs = 0xe4,
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.sta_ofs = 0xe4,
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};
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#define GATE_SGMII0(_id, _name, _parent, _shift) \
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GATE_MTK(_id, _name, _parent, &sgmii0_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
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static const struct mtk_gate sgmii0_clks[] = {
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GATE_SGMII0(CLK_SGMII0_TX250M_EN, "sgmii0_tx250m_en", "top_xtal", 2),
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GATE_SGMII0(CLK_SGMII0_RX250M_EN, "sgmii0_rx250m_en", "top_xtal", 3),
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GATE_SGMII0(CLK_SGMII0_CDR_REF, "sgmii0_cdr_ref", "top_xtal", 4),
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GATE_SGMII0(CLK_SGMII0_CDR_FB, "sgmii0_cdr_fb", "top_xtal", 5),
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};
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static const struct mtk_gate_regs sgmii1_cg_regs = {
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.set_ofs = 0xe4,
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.clr_ofs = 0xe4,
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.sta_ofs = 0xe4,
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};
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#define GATE_SGMII1(_id, _name, _parent, _shift) \
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GATE_MTK(_id, _name, _parent, &sgmii1_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
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static const struct mtk_gate sgmii1_clks[] = {
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GATE_SGMII1(CLK_SGMII1_TX250M_EN, "sgmii1_tx250m_en", "top_xtal", 2),
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GATE_SGMII1(CLK_SGMII1_RX250M_EN, "sgmii1_rx250m_en", "top_xtal", 3),
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GATE_SGMII1(CLK_SGMII1_CDR_REF, "sgmii1_cdr_ref", "top_xtal", 4),
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GATE_SGMII1(CLK_SGMII1_CDR_FB, "sgmii1_cdr_fb", "top_xtal", 5),
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};
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static const struct mtk_gate_regs eth_cg_regs = {
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.set_ofs = 0x30,
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.clr_ofs = 0x30,
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.sta_ofs = 0x30,
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};
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#define GATE_ETH(_id, _name, _parent, _shift) \
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GATE_MTK(_id, _name, _parent, ð_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
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static const struct mtk_gate eth_clks[] = {
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GATE_ETH(CLK_ETH_FE_EN, "eth_fe_en", "netsys_2x_sel", 6),
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GATE_ETH(CLK_ETH_GP2_EN, "eth_gp2_en", "sgm_325m_sel", 7),
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GATE_ETH(CLK_ETH_GP1_EN, "eth_gp1_en", "sgm_325m_sel", 8),
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GATE_ETH(CLK_ETH_WOCPU1_EN, "eth_wocpu1_en", "netsys_mcu_sel", 14),
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GATE_ETH(CLK_ETH_WOCPU0_EN, "eth_wocpu0_en", "netsys_mcu_sel", 15),
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};
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static const struct mtk_clk_desc eth_desc = {
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.clks = eth_clks,
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.num_clks = ARRAY_SIZE(eth_clks),
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};
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static const struct mtk_clk_desc sgmii0_desc = {
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.clks = sgmii0_clks,
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.num_clks = ARRAY_SIZE(sgmii0_clks),
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};
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static const struct mtk_clk_desc sgmii1_desc = {
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.clks = sgmii1_clks,
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.num_clks = ARRAY_SIZE(sgmii1_clks),
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};
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static const struct of_device_id of_match_clk_mt7986_eth[] = {
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{ .compatible = "mediatek,mt7986-ethsys", .data = ð_desc },
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{ .compatible = "mediatek,mt7986-sgmiisys_0", .data = &sgmii0_desc },
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{ .compatible = "mediatek,mt7986-sgmiisys_1", .data = &sgmii1_desc },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, of_match_clk_mt7986_eth);
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static struct platform_driver clk_mt7986_eth_drv = {
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.driver = {
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.name = "clk-mt7986-eth",
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.of_match_table = of_match_clk_mt7986_eth,
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},
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.probe = mtk_clk_simple_probe,
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.remove_new = mtk_clk_simple_remove,
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};
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module_platform_driver(clk_mt7986_eth_drv);
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MODULE_DESCRIPTION("MediaTek MT7986 Ethernet clocks driver");
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MODULE_LICENSE("GPL");
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