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The Ux500 PRCC (peripheral reset and clock controller) can also control reset of the IP blocks, not just clocks. As the PRCC is probed as a clock controller and we have other platforms implementing combined clock and reset controllers, follow this pattern and implement the PRCC rest controller as part of the clock driver. The reset controller needs to be selected from the machine as Ux500 has traditionally selected its mandatory subsystem prerequisites from there. Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20210921184803.1757916-2-linus.walleij@linaro.org Acked-by: Ulf Hansson <ulf.hansson@linaro.org> [sboyd@kernel.org: Dropped allocation error message] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
18 lines
275 B
Makefile
18 lines
275 B
Makefile
# SPDX-License-Identifier: GPL-2.0
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#
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# Makefile for ux500 clocks
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#
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# Clock types
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obj-y += clk-prcc.o
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obj-y += clk-prcmu.o
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obj-y += clk-sysctrl.o
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# Reset control
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obj-y += reset-prcc.o
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# Clock definitions
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obj-y += u8500_of_clk.o
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# ABX500 clock driver
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obj-y += abx500-clk.o
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