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![Maxime Ripard](/assets/img/avatar_default.png)
The UX500 PRCMU "clkout" clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The PRCMU binding also allows to specify the default clock parent through a device tree cell. This will be enforced at prepare time by the driver. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. The result is that the driver relies on prepare to set the default parent, and thus the set_parent hook is effectively unused by design. We can make that decision explicit by setting the determine_rate implementation to clk_hw_determine_rate_no_reparent() that will keep the same behaviour. Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: linux-arm-kernel@lists.infradead.org Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20221018-clk-range-checks-fixes-v4-37-971d5077e7d2@cerno.tech Signed-off-by: Stephen Boyd <sboyd@kernel.org>
401 lines
9.7 KiB
C
401 lines
9.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* PRCMU clock implementation for ux500 platform.
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*
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* Copyright (C) 2012 ST-Ericsson SA
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* Author: Ulf Hansson <ulf.hansson@linaro.org>
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*/
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#include <linux/clk-provider.h>
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#include <linux/mfd/dbx500-prcmu.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include "clk.h"
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#define to_clk_prcmu(_hw) container_of(_hw, struct clk_prcmu, hw)
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#define to_clk_prcmu_clkout(_hw) container_of(_hw, struct clk_prcmu_clkout, hw)
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struct clk_prcmu {
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struct clk_hw hw;
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u8 cg_sel;
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int opp_requested;
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};
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struct clk_prcmu_clkout {
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struct clk_hw hw;
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u8 clkout_id;
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u8 source;
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u8 divider;
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};
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/* PRCMU clock operations. */
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static int clk_prcmu_prepare(struct clk_hw *hw)
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{
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struct clk_prcmu *clk = to_clk_prcmu(hw);
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return prcmu_request_clock(clk->cg_sel, true);
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}
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static void clk_prcmu_unprepare(struct clk_hw *hw)
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{
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struct clk_prcmu *clk = to_clk_prcmu(hw);
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if (prcmu_request_clock(clk->cg_sel, false))
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pr_err("clk_prcmu: %s failed to disable %s.\n", __func__,
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clk_hw_get_name(hw));
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}
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static unsigned long clk_prcmu_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct clk_prcmu *clk = to_clk_prcmu(hw);
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return prcmu_clock_rate(clk->cg_sel);
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}
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static long clk_prcmu_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *parent_rate)
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{
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struct clk_prcmu *clk = to_clk_prcmu(hw);
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return prcmu_round_clock_rate(clk->cg_sel, rate);
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}
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static int clk_prcmu_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct clk_prcmu *clk = to_clk_prcmu(hw);
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return prcmu_set_clock_rate(clk->cg_sel, rate);
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}
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static int clk_prcmu_opp_prepare(struct clk_hw *hw)
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{
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int err;
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struct clk_prcmu *clk = to_clk_prcmu(hw);
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if (!clk->opp_requested) {
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err = prcmu_qos_add_requirement(PRCMU_QOS_APE_OPP,
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(char *)clk_hw_get_name(hw),
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100);
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if (err) {
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pr_err("clk_prcmu: %s fail req APE OPP for %s.\n",
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__func__, clk_hw_get_name(hw));
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return err;
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}
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clk->opp_requested = 1;
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}
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err = prcmu_request_clock(clk->cg_sel, true);
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if (err) {
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prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP,
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(char *)clk_hw_get_name(hw));
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clk->opp_requested = 0;
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return err;
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}
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return 0;
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}
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static void clk_prcmu_opp_unprepare(struct clk_hw *hw)
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{
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struct clk_prcmu *clk = to_clk_prcmu(hw);
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if (prcmu_request_clock(clk->cg_sel, false)) {
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pr_err("clk_prcmu: %s failed to disable %s.\n", __func__,
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clk_hw_get_name(hw));
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return;
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}
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if (clk->opp_requested) {
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prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP,
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(char *)clk_hw_get_name(hw));
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clk->opp_requested = 0;
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}
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}
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static int clk_prcmu_opp_volt_prepare(struct clk_hw *hw)
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{
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int err;
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struct clk_prcmu *clk = to_clk_prcmu(hw);
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if (!clk->opp_requested) {
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err = prcmu_request_ape_opp_100_voltage(true);
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if (err) {
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pr_err("clk_prcmu: %s fail req APE OPP VOLT for %s.\n",
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__func__, clk_hw_get_name(hw));
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return err;
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}
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clk->opp_requested = 1;
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}
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err = prcmu_request_clock(clk->cg_sel, true);
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if (err) {
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prcmu_request_ape_opp_100_voltage(false);
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clk->opp_requested = 0;
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return err;
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}
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return 0;
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}
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static void clk_prcmu_opp_volt_unprepare(struct clk_hw *hw)
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{
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struct clk_prcmu *clk = to_clk_prcmu(hw);
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if (prcmu_request_clock(clk->cg_sel, false)) {
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pr_err("clk_prcmu: %s failed to disable %s.\n", __func__,
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clk_hw_get_name(hw));
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return;
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}
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if (clk->opp_requested) {
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prcmu_request_ape_opp_100_voltage(false);
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clk->opp_requested = 0;
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}
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}
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static const struct clk_ops clk_prcmu_scalable_ops = {
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.prepare = clk_prcmu_prepare,
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.unprepare = clk_prcmu_unprepare,
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.recalc_rate = clk_prcmu_recalc_rate,
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.round_rate = clk_prcmu_round_rate,
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.set_rate = clk_prcmu_set_rate,
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};
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static const struct clk_ops clk_prcmu_gate_ops = {
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.prepare = clk_prcmu_prepare,
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.unprepare = clk_prcmu_unprepare,
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.recalc_rate = clk_prcmu_recalc_rate,
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};
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static const struct clk_ops clk_prcmu_scalable_rate_ops = {
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.recalc_rate = clk_prcmu_recalc_rate,
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.round_rate = clk_prcmu_round_rate,
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.set_rate = clk_prcmu_set_rate,
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};
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static const struct clk_ops clk_prcmu_rate_ops = {
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.recalc_rate = clk_prcmu_recalc_rate,
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};
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static const struct clk_ops clk_prcmu_opp_gate_ops = {
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.prepare = clk_prcmu_opp_prepare,
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.unprepare = clk_prcmu_opp_unprepare,
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.recalc_rate = clk_prcmu_recalc_rate,
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};
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static const struct clk_ops clk_prcmu_opp_volt_scalable_ops = {
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.prepare = clk_prcmu_opp_volt_prepare,
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.unprepare = clk_prcmu_opp_volt_unprepare,
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.recalc_rate = clk_prcmu_recalc_rate,
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.round_rate = clk_prcmu_round_rate,
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.set_rate = clk_prcmu_set_rate,
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};
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static struct clk_hw *clk_reg_prcmu(const char *name,
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const char *parent_name,
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u8 cg_sel,
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unsigned long rate,
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unsigned long flags,
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const struct clk_ops *clk_prcmu_ops)
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{
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struct clk_prcmu *clk;
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struct clk_init_data clk_prcmu_init;
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int ret;
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if (!name) {
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pr_err("clk_prcmu: %s invalid arguments passed\n", __func__);
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return ERR_PTR(-EINVAL);
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}
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clk = kzalloc(sizeof(*clk), GFP_KERNEL);
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if (!clk)
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return ERR_PTR(-ENOMEM);
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clk->cg_sel = cg_sel;
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clk->opp_requested = 0;
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/* "rate" can be used for changing the initial frequency */
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if (rate)
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prcmu_set_clock_rate(cg_sel, rate);
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clk_prcmu_init.name = name;
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clk_prcmu_init.ops = clk_prcmu_ops;
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clk_prcmu_init.flags = flags;
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clk_prcmu_init.parent_names = (parent_name ? &parent_name : NULL);
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clk_prcmu_init.num_parents = (parent_name ? 1 : 0);
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clk->hw.init = &clk_prcmu_init;
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ret = clk_hw_register(NULL, &clk->hw);
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if (ret)
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goto free_clk;
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return &clk->hw;
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free_clk:
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kfree(clk);
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pr_err("clk_prcmu: %s failed to register clk\n", __func__);
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return ERR_PTR(-ENOMEM);
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}
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struct clk_hw *clk_reg_prcmu_scalable(const char *name,
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const char *parent_name,
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u8 cg_sel,
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unsigned long rate,
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unsigned long flags)
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{
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return clk_reg_prcmu(name, parent_name, cg_sel, rate, flags,
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&clk_prcmu_scalable_ops);
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}
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struct clk_hw *clk_reg_prcmu_gate(const char *name,
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const char *parent_name,
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u8 cg_sel,
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unsigned long flags)
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{
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return clk_reg_prcmu(name, parent_name, cg_sel, 0, flags,
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&clk_prcmu_gate_ops);
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}
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struct clk_hw *clk_reg_prcmu_scalable_rate(const char *name,
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const char *parent_name,
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u8 cg_sel,
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unsigned long rate,
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unsigned long flags)
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{
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return clk_reg_prcmu(name, parent_name, cg_sel, rate, flags,
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&clk_prcmu_scalable_rate_ops);
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}
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struct clk_hw *clk_reg_prcmu_rate(const char *name,
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const char *parent_name,
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u8 cg_sel,
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unsigned long flags)
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{
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return clk_reg_prcmu(name, parent_name, cg_sel, 0, flags,
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&clk_prcmu_rate_ops);
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}
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struct clk_hw *clk_reg_prcmu_opp_gate(const char *name,
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const char *parent_name,
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u8 cg_sel,
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unsigned long flags)
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{
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return clk_reg_prcmu(name, parent_name, cg_sel, 0, flags,
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&clk_prcmu_opp_gate_ops);
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}
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struct clk_hw *clk_reg_prcmu_opp_volt_scalable(const char *name,
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const char *parent_name,
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u8 cg_sel,
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unsigned long rate,
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unsigned long flags)
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{
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return clk_reg_prcmu(name, parent_name, cg_sel, rate, flags,
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&clk_prcmu_opp_volt_scalable_ops);
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}
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/* The clkout (external) clock is special and need special ops */
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static int clk_prcmu_clkout_prepare(struct clk_hw *hw)
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{
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struct clk_prcmu_clkout *clk = to_clk_prcmu_clkout(hw);
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return prcmu_config_clkout(clk->clkout_id, clk->source, clk->divider);
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}
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static void clk_prcmu_clkout_unprepare(struct clk_hw *hw)
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{
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struct clk_prcmu_clkout *clk = to_clk_prcmu_clkout(hw);
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int ret;
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/* The clkout clock is disabled by dividing by 0 */
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ret = prcmu_config_clkout(clk->clkout_id, clk->source, 0);
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if (ret)
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pr_err("clk_prcmu: %s failed to disable %s\n", __func__,
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clk_hw_get_name(hw));
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}
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static unsigned long clk_prcmu_clkout_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct clk_prcmu_clkout *clk = to_clk_prcmu_clkout(hw);
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return (parent_rate / clk->divider);
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}
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static u8 clk_prcmu_clkout_get_parent(struct clk_hw *hw)
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{
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struct clk_prcmu_clkout *clk = to_clk_prcmu_clkout(hw);
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return clk->source;
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}
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static int clk_prcmu_clkout_set_parent(struct clk_hw *hw, u8 index)
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{
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struct clk_prcmu_clkout *clk = to_clk_prcmu_clkout(hw);
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clk->source = index;
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/* Make sure the change reaches the hardware immediately */
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if (clk_hw_is_prepared(hw))
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return clk_prcmu_clkout_prepare(hw);
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return 0;
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}
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static const struct clk_ops clk_prcmu_clkout_ops = {
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.prepare = clk_prcmu_clkout_prepare,
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.unprepare = clk_prcmu_clkout_unprepare,
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.recalc_rate = clk_prcmu_clkout_recalc_rate,
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.determine_rate = clk_hw_determine_rate_no_reparent,
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.get_parent = clk_prcmu_clkout_get_parent,
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.set_parent = clk_prcmu_clkout_set_parent,
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};
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struct clk_hw *clk_reg_prcmu_clkout(const char *name,
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const char * const *parent_names,
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int num_parents,
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u8 source, u8 divider)
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{
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struct clk_prcmu_clkout *clk;
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struct clk_init_data clk_prcmu_clkout_init;
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u8 clkout_id;
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int ret;
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if (!name) {
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pr_err("clk_prcmu_clkout: %s invalid arguments passed\n", __func__);
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return ERR_PTR(-EINVAL);
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}
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if (!strcmp(name, "clkout1"))
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clkout_id = 0;
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else if (!strcmp(name, "clkout2"))
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clkout_id = 1;
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else {
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pr_err("clk_prcmu_clkout: %s bad clock name\n", __func__);
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return ERR_PTR(-EINVAL);
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}
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clk = kzalloc(sizeof(*clk), GFP_KERNEL);
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if (!clk)
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return ERR_PTR(-ENOMEM);
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clk->clkout_id = clkout_id;
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clk->source = source;
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clk->divider = divider;
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clk_prcmu_clkout_init.name = name;
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clk_prcmu_clkout_init.ops = &clk_prcmu_clkout_ops;
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clk_prcmu_clkout_init.flags = CLK_GET_RATE_NOCACHE;
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clk_prcmu_clkout_init.parent_names = parent_names;
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clk_prcmu_clkout_init.num_parents = num_parents;
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clk->hw.init = &clk_prcmu_clkout_init;
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ret = clk_hw_register(NULL, &clk->hw);
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if (ret)
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goto free_clkout;
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return &clk->hw;
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free_clkout:
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kfree(clk);
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pr_err("clk_prcmu_clkout: %s failed to register clk\n", __func__);
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return ERR_PTR(-ENOMEM);
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}
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