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dc6ae2057c
This platform from Ralink was acquired by MediaTek in 2011. Then, MediaTek introduced new SoCs which utilise this platform. Move the driver to mediatek pinctrl directory. Rename the ralink core driver to mtmips. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Link: https://lore.kernel.org/r/20230317213011.13656-5-arinc.unal@arinc9.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
140 lines
5.1 KiB
C
140 lines
5.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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#include <asm/mach-ralink/ralink_regs.h>
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#include <asm/mach-ralink/rt305x.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include "pinctrl-mtmips.h"
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#define RT305X_GPIO_MODE_UART0_SHIFT 2
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#define RT305X_GPIO_MODE_UART0_MASK 0x7
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#define RT305X_GPIO_MODE_UART0(x) ((x) << RT305X_GPIO_MODE_UART0_SHIFT)
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#define RT305X_GPIO_MODE_UARTF 0
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#define RT305X_GPIO_MODE_PCM_UARTF 1
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#define RT305X_GPIO_MODE_PCM_I2S 2
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#define RT305X_GPIO_MODE_I2S_UARTF 3
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#define RT305X_GPIO_MODE_PCM_GPIO 4
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#define RT305X_GPIO_MODE_GPIO_UARTF 5
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#define RT305X_GPIO_MODE_GPIO_I2S 6
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#define RT305X_GPIO_MODE_GPIO 7
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#define RT305X_GPIO_MODE_I2C 0
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#define RT305X_GPIO_MODE_SPI 1
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#define RT305X_GPIO_MODE_UART1 5
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#define RT305X_GPIO_MODE_JTAG 6
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#define RT305X_GPIO_MODE_MDIO 7
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#define RT305X_GPIO_MODE_SDRAM 8
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#define RT305X_GPIO_MODE_RGMII 9
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#define RT5350_GPIO_MODE_PHY_LED 14
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#define RT5350_GPIO_MODE_SPI_CS1 21
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#define RT3352_GPIO_MODE_LNA 18
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#define RT3352_GPIO_MODE_PA 20
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static struct mtmips_pmx_func i2c_grp[] = { FUNC("i2c", 0, 1, 2) };
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static struct mtmips_pmx_func spi_grp[] = { FUNC("spi", 0, 3, 4) };
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static struct mtmips_pmx_func uartf_grp[] = {
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FUNC("uartf", RT305X_GPIO_MODE_UARTF, 7, 8),
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FUNC("pcm uartf", RT305X_GPIO_MODE_PCM_UARTF, 7, 8),
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FUNC("pcm i2s", RT305X_GPIO_MODE_PCM_I2S, 7, 8),
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FUNC("i2s uartf", RT305X_GPIO_MODE_I2S_UARTF, 7, 8),
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FUNC("pcm gpio", RT305X_GPIO_MODE_PCM_GPIO, 11, 4),
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FUNC("gpio uartf", RT305X_GPIO_MODE_GPIO_UARTF, 7, 4),
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FUNC("gpio i2s", RT305X_GPIO_MODE_GPIO_I2S, 7, 4),
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};
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static struct mtmips_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 15, 2) };
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static struct mtmips_pmx_func jtag_grp[] = { FUNC("jtag", 0, 17, 5) };
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static struct mtmips_pmx_func mdio_grp[] = { FUNC("mdio", 0, 22, 2) };
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static struct mtmips_pmx_func rt5350_led_grp[] = { FUNC("led", 0, 22, 5) };
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static struct mtmips_pmx_func rt5350_cs1_grp[] = {
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FUNC("spi_cs1", 0, 27, 1),
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FUNC("wdg_cs1", 1, 27, 1),
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};
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static struct mtmips_pmx_func sdram_grp[] = { FUNC("sdram", 0, 24, 16) };
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static struct mtmips_pmx_func rt3352_rgmii_grp[] = {
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FUNC("rgmii", 0, 24, 12)
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};
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static struct mtmips_pmx_func rgmii_grp[] = { FUNC("rgmii", 0, 40, 12) };
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static struct mtmips_pmx_func rt3352_lna_grp[] = { FUNC("lna", 0, 36, 2) };
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static struct mtmips_pmx_func rt3352_pa_grp[] = { FUNC("pa", 0, 38, 2) };
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static struct mtmips_pmx_func rt3352_led_grp[] = { FUNC("led", 0, 40, 5) };
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static struct mtmips_pmx_func rt3352_cs1_grp[] = {
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FUNC("spi_cs1", 0, 45, 1),
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FUNC("wdg_cs1", 1, 45, 1),
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};
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static struct mtmips_pmx_group rt3050_pinmux_data[] = {
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GRP("i2c", i2c_grp, 1, RT305X_GPIO_MODE_I2C),
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GRP("spi", spi_grp, 1, RT305X_GPIO_MODE_SPI),
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GRP("uartf", uartf_grp, RT305X_GPIO_MODE_UART0_MASK,
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RT305X_GPIO_MODE_UART0_SHIFT),
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GRP("uartlite", uartlite_grp, 1, RT305X_GPIO_MODE_UART1),
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GRP("jtag", jtag_grp, 1, RT305X_GPIO_MODE_JTAG),
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GRP("mdio", mdio_grp, 1, RT305X_GPIO_MODE_MDIO),
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GRP("rgmii", rgmii_grp, 1, RT305X_GPIO_MODE_RGMII),
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GRP("sdram", sdram_grp, 1, RT305X_GPIO_MODE_SDRAM),
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{ 0 }
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};
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static struct mtmips_pmx_group rt3352_pinmux_data[] = {
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GRP("i2c", i2c_grp, 1, RT305X_GPIO_MODE_I2C),
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GRP("spi", spi_grp, 1, RT305X_GPIO_MODE_SPI),
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GRP("uartf", uartf_grp, RT305X_GPIO_MODE_UART0_MASK,
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RT305X_GPIO_MODE_UART0_SHIFT),
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GRP("uartlite", uartlite_grp, 1, RT305X_GPIO_MODE_UART1),
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GRP("jtag", jtag_grp, 1, RT305X_GPIO_MODE_JTAG),
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GRP("mdio", mdio_grp, 1, RT305X_GPIO_MODE_MDIO),
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GRP("rgmii", rt3352_rgmii_grp, 1, RT305X_GPIO_MODE_RGMII),
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GRP("lna", rt3352_lna_grp, 1, RT3352_GPIO_MODE_LNA),
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GRP("pa", rt3352_pa_grp, 1, RT3352_GPIO_MODE_PA),
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GRP("led", rt3352_led_grp, 1, RT5350_GPIO_MODE_PHY_LED),
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GRP("spi_cs1", rt3352_cs1_grp, 2, RT5350_GPIO_MODE_SPI_CS1),
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{ 0 }
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};
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static struct mtmips_pmx_group rt5350_pinmux_data[] = {
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GRP("i2c", i2c_grp, 1, RT305X_GPIO_MODE_I2C),
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GRP("spi", spi_grp, 1, RT305X_GPIO_MODE_SPI),
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GRP("uartf", uartf_grp, RT305X_GPIO_MODE_UART0_MASK,
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RT305X_GPIO_MODE_UART0_SHIFT),
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GRP("uartlite", uartlite_grp, 1, RT305X_GPIO_MODE_UART1),
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GRP("jtag", jtag_grp, 1, RT305X_GPIO_MODE_JTAG),
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GRP("led", rt5350_led_grp, 1, RT5350_GPIO_MODE_PHY_LED),
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GRP("spi_cs1", rt5350_cs1_grp, 2, RT5350_GPIO_MODE_SPI_CS1),
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{ 0 }
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};
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static int rt305x_pinctrl_probe(struct platform_device *pdev)
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{
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if (soc_is_rt5350())
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return mtmips_pinctrl_init(pdev, rt5350_pinmux_data);
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else if (soc_is_rt305x() || soc_is_rt3350())
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return mtmips_pinctrl_init(pdev, rt3050_pinmux_data);
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else if (soc_is_rt3352())
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return mtmips_pinctrl_init(pdev, rt3352_pinmux_data);
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else
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return -EINVAL;
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}
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static const struct of_device_id rt305x_pinctrl_match[] = {
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{ .compatible = "ralink,rt305x-pinctrl" },
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{ .compatible = "ralink,rt3352-pinctrl" },
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{ .compatible = "ralink,rt5350-pinctrl" },
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{ .compatible = "ralink,rt2880-pinmux" },
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{}
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};
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MODULE_DEVICE_TABLE(of, rt305x_pinctrl_match);
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static struct platform_driver rt305x_pinctrl_driver = {
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.probe = rt305x_pinctrl_probe,
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.driver = {
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.name = "rt305x-pinctrl",
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.of_match_table = rt305x_pinctrl_match,
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},
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};
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static int __init rt305x_pinctrl_init(void)
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{
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return platform_driver_register(&rt305x_pinctrl_driver);
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}
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core_initcall_sync(rt305x_pinctrl_init);
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