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59c1502527
None of the sunxi pin controllers have a module reset line. All of the SoC documentation, where available, agrees. The bits that would be used for the PIO reset (i.e. matching the order of the clock gate bits) are always reserved, both in the CCU and in the PRCM. And experiments on several SoCs, including the A33, confirm that those reserved bits indeed have no effect. Let's remove this superfluous code and dependency, and also remove the include statement that was copied to the other r_pio drivers. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220531053623.43851-2-samuel@sholland.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
115 lines
3.9 KiB
C
115 lines
3.9 KiB
C
/*
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* Allwinner A23 SoCs special pins pinctrl driver.
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*
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* Copyright (C) 2014 Chen-Yu Tsai
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* Chen-Yu Tsai <wens@csie.org>
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*
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* Copyright (C) 2014 Boris Brezillon
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* Boris Brezillon <boris.brezillon@free-electrons.com>
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*
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* Copyright (C) 2014 Maxime Ripard
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* Maxime Ripard <maxime.ripard@free-electrons.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/pinctrl/pinctrl.h>
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#include "pinctrl-sunxi.h"
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static const struct sunxi_desc_pin sun8i_a23_r_pins[] = {
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "s_rsb"), /* SCK */
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SUNXI_FUNCTION(0x3, "s_i2c"), /* SCK */
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 0)), /* PL_EINT0 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "s_rsb"), /* SDA */
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SUNXI_FUNCTION(0x3, "s_i2c"), /* SDA */
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 1)), /* PL_EINT1 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "s_uart"), /* TX */
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 2)), /* PL_EINT2 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "s_uart"), /* RX */
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 3)), /* PL_EINT3 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x3, "s_jtag"), /* MS */
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 4)), /* PL_EINT4 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x3, "s_jtag"), /* CK */
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 5)), /* PL_EINT5 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x3, "s_jtag"), /* DO */
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 6)), /* PL_EINT6 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x3, "s_jtag"), /* DI */
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 7)), /* PL_EINT7 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "s_twi"), /* SCK */
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 8)), /* PL_EINT8 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 9),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "s_twi"), /* SDA */
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 9)), /* PL_EINT9 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 10),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "s_pwm"),
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 10)), /* PL_EINT10 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 11),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 11)), /* PL_EINT11 */
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};
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static const struct sunxi_pinctrl_desc sun8i_a23_r_pinctrl_data = {
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.pins = sun8i_a23_r_pins,
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.npins = ARRAY_SIZE(sun8i_a23_r_pins),
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.pin_base = PL_BASE,
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.irq_banks = 1,
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.disable_strict_mode = true,
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};
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static int sun8i_a23_r_pinctrl_probe(struct platform_device *pdev)
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{
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return sunxi_pinctrl_init(pdev, &sun8i_a23_r_pinctrl_data);
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}
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static const struct of_device_id sun8i_a23_r_pinctrl_match[] = {
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{ .compatible = "allwinner,sun8i-a23-r-pinctrl", },
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{}
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};
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static struct platform_driver sun8i_a23_r_pinctrl_driver = {
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.probe = sun8i_a23_r_pinctrl_probe,
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.driver = {
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.name = "sun8i-a23-r-pinctrl",
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.of_match_table = sun8i_a23_r_pinctrl_match,
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},
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};
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builtin_platform_driver(sun8i_a23_r_pinctrl_driver);
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