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![Mike Leach](/assets/img/avatar_default.png)
The information to associate Trace ID and CPU will be changing. Drivers will start outputting this as a hardware ID packet in the data file which if present will be used in preference to the AUXINFO values. To prepare for this we provide a helper functions to do the individual ID mapping, and one to extract the IDs from the completed metadata blocks. Reviewed-by: James Clark <james.clark@arm.com> Signed-off-by: Mike Leach <mike.leach@linaro.org> Acked-by: Suzuki Poulouse <suzuki.poulose@arm.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Darren Hart <darren@os.amperecomputing.com> Cc: Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Leo Yan <leo.yan@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Will Deacon <will@kernel.org> Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20230331055645.26918-2-mike.leach@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
193 lines
6.2 KiB
C
193 lines
6.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* File for any parts of the Coresight decoding that don't require
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* OpenCSD.
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*/
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#include <errno.h>
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#include <inttypes.h>
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#include "cs-etm.h"
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static const char * const cs_etm_global_header_fmts[] = {
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[CS_HEADER_VERSION] = " Header version %llx\n",
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[CS_PMU_TYPE_CPUS] = " PMU type/num cpus %llx\n",
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[CS_ETM_SNAPSHOT] = " Snapshot %llx\n",
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};
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static const char * const cs_etm_priv_fmts[] = {
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[CS_ETM_MAGIC] = " Magic number %llx\n",
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[CS_ETM_CPU] = " CPU %lld\n",
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[CS_ETM_NR_TRC_PARAMS] = " NR_TRC_PARAMS %llx\n",
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[CS_ETM_ETMCR] = " ETMCR %llx\n",
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[CS_ETM_ETMTRACEIDR] = " ETMTRACEIDR %llx\n",
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[CS_ETM_ETMCCER] = " ETMCCER %llx\n",
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[CS_ETM_ETMIDR] = " ETMIDR %llx\n",
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};
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static const char * const cs_etmv4_priv_fmts[] = {
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[CS_ETM_MAGIC] = " Magic number %llx\n",
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[CS_ETM_CPU] = " CPU %lld\n",
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[CS_ETM_NR_TRC_PARAMS] = " NR_TRC_PARAMS %llx\n",
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[CS_ETMV4_TRCCONFIGR] = " TRCCONFIGR %llx\n",
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[CS_ETMV4_TRCTRACEIDR] = " TRCTRACEIDR %llx\n",
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[CS_ETMV4_TRCIDR0] = " TRCIDR0 %llx\n",
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[CS_ETMV4_TRCIDR1] = " TRCIDR1 %llx\n",
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[CS_ETMV4_TRCIDR2] = " TRCIDR2 %llx\n",
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[CS_ETMV4_TRCIDR8] = " TRCIDR8 %llx\n",
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[CS_ETMV4_TRCAUTHSTATUS] = " TRCAUTHSTATUS %llx\n",
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[CS_ETMV4_TS_SOURCE] = " TS_SOURCE %lld\n",
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};
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static const char * const cs_ete_priv_fmts[] = {
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[CS_ETM_MAGIC] = " Magic number %llx\n",
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[CS_ETM_CPU] = " CPU %lld\n",
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[CS_ETM_NR_TRC_PARAMS] = " NR_TRC_PARAMS %llx\n",
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[CS_ETE_TRCCONFIGR] = " TRCCONFIGR %llx\n",
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[CS_ETE_TRCTRACEIDR] = " TRCTRACEIDR %llx\n",
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[CS_ETE_TRCIDR0] = " TRCIDR0 %llx\n",
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[CS_ETE_TRCIDR1] = " TRCIDR1 %llx\n",
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[CS_ETE_TRCIDR2] = " TRCIDR2 %llx\n",
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[CS_ETE_TRCIDR8] = " TRCIDR8 %llx\n",
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[CS_ETE_TRCAUTHSTATUS] = " TRCAUTHSTATUS %llx\n",
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[CS_ETE_TRCDEVARCH] = " TRCDEVARCH %llx\n",
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[CS_ETE_TS_SOURCE] = " TS_SOURCE %lld\n",
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};
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static const char * const param_unk_fmt =
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" Unknown parameter [%d] %"PRIx64"\n";
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static const char * const magic_unk_fmt =
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" Magic number Unknown %"PRIx64"\n";
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static int cs_etm__print_cpu_metadata_v0(u64 *val, int *offset)
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{
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int i = *offset, j, nr_params = 0, fmt_offset;
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u64 magic;
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/* check magic value */
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magic = val[i + CS_ETM_MAGIC];
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if ((magic != __perf_cs_etmv3_magic) &&
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(magic != __perf_cs_etmv4_magic)) {
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/* failure - note bad magic value */
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fprintf(stdout, magic_unk_fmt, magic);
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return -EINVAL;
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}
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/* print common header block */
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fprintf(stdout, cs_etm_priv_fmts[CS_ETM_MAGIC], val[i++]);
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fprintf(stdout, cs_etm_priv_fmts[CS_ETM_CPU], val[i++]);
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if (magic == __perf_cs_etmv3_magic) {
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nr_params = CS_ETM_NR_TRC_PARAMS_V0;
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fmt_offset = CS_ETM_ETMCR;
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/* after common block, offset format index past NR_PARAMS */
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for (j = fmt_offset; j < nr_params + fmt_offset; j++, i++)
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fprintf(stdout, cs_etm_priv_fmts[j], val[i]);
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} else if (magic == __perf_cs_etmv4_magic) {
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nr_params = CS_ETMV4_NR_TRC_PARAMS_V0;
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fmt_offset = CS_ETMV4_TRCCONFIGR;
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/* after common block, offset format index past NR_PARAMS */
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for (j = fmt_offset; j < nr_params + fmt_offset; j++, i++)
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fprintf(stdout, cs_etmv4_priv_fmts[j], val[i]);
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}
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*offset = i;
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return 0;
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}
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static int cs_etm__print_cpu_metadata_v1(u64 *val, int *offset)
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{
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int i = *offset, j, total_params = 0;
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u64 magic;
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magic = val[i + CS_ETM_MAGIC];
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/* total params to print is NR_PARAMS + common block size for v1 */
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total_params = val[i + CS_ETM_NR_TRC_PARAMS] + CS_ETM_COMMON_BLK_MAX_V1;
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if (magic == __perf_cs_etmv3_magic) {
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for (j = 0; j < total_params; j++, i++) {
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/* if newer record - could be excess params */
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if (j >= CS_ETM_PRIV_MAX)
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fprintf(stdout, param_unk_fmt, j, val[i]);
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else
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fprintf(stdout, cs_etm_priv_fmts[j], val[i]);
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}
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} else if (magic == __perf_cs_etmv4_magic) {
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for (j = 0; j < total_params; j++, i++) {
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/* if newer record - could be excess params */
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if (j >= CS_ETMV4_PRIV_MAX)
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fprintf(stdout, param_unk_fmt, j, val[i]);
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else
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fprintf(stdout, cs_etmv4_priv_fmts[j], val[i]);
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}
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} else if (magic == __perf_cs_ete_magic) {
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for (j = 0; j < total_params; j++, i++) {
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/* if newer record - could be excess params */
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if (j >= CS_ETE_PRIV_MAX)
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fprintf(stdout, param_unk_fmt, j, val[i]);
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else
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fprintf(stdout, cs_ete_priv_fmts[j], val[i]);
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}
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} else {
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/* failure - note bad magic value and error out */
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fprintf(stdout, magic_unk_fmt, magic);
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return -EINVAL;
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}
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*offset = i;
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return 0;
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}
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static void cs_etm__print_auxtrace_info(u64 *val, int num)
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{
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int i, cpu = 0, version, err;
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version = val[0];
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for (i = 0; i < CS_HEADER_VERSION_MAX; i++)
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fprintf(stdout, cs_etm_global_header_fmts[i], val[i]);
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for (i = CS_HEADER_VERSION_MAX; cpu < num; cpu++) {
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if (version == 0)
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err = cs_etm__print_cpu_metadata_v0(val, &i);
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/* printing same for both, but value bit flags added on v2 */
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else if ((version == 1) || (version == 2))
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err = cs_etm__print_cpu_metadata_v1(val, &i);
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if (err)
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return;
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}
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}
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/*
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* Do some basic checks and print the auxtrace info header before calling
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* into cs_etm__process_auxtrace_info_full() which requires OpenCSD to be
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* linked in. This allows some basic debugging if OpenCSD is missing.
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*/
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int cs_etm__process_auxtrace_info(union perf_event *event,
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struct perf_session *session)
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{
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struct perf_record_auxtrace_info *auxtrace_info = &event->auxtrace_info;
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int event_header_size = sizeof(struct perf_event_header);
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int num_cpu;
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u64 *ptr = NULL;
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u64 hdr_version;
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if (auxtrace_info->header.size < (event_header_size + INFO_HEADER_SIZE))
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return -EINVAL;
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/* First the global part */
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ptr = (u64 *) auxtrace_info->priv;
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/* Look for version of the header */
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hdr_version = ptr[0];
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if (hdr_version > CS_HEADER_CURRENT_VERSION) {
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pr_err("\nCS ETM Trace: Unknown Header Version = %#" PRIx64, hdr_version);
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pr_err(", version supported <= %x\n", CS_HEADER_CURRENT_VERSION);
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return -EINVAL;
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}
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if (dump_trace) {
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num_cpu = ptr[CS_PMU_TYPE_CPUS] & 0xffffffff;
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cs_etm__print_auxtrace_info(ptr, num_cpu);
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}
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return cs_etm__process_auxtrace_info_full(event, session);
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}
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