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![Adrian Hunter](/assets/img/avatar_default.png)
Implement ->evsel_is_auxtrace() callback. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Acked-by: Thomas Richter <tmricht@linux.ibm.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Jiri Olsa <jolsa@redhat.com> Link: http://lore.kernel.org/lkml/20200401101613.6201-7-adrian.hunter@intel.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
63 lines
2.1 KiB
C
63 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Support for s390 CPU measurement counter set diagnostic facility
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*
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* Copyright IBM Corp. 2019
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Author(s): Hendrik Brueckner <brueckner@linux.ibm.com>
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* Thomas Richter <tmricht@linux.ibm.com>
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*/
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#ifndef S390_CPUMCF_KERNEL_H
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#define S390_CPUMCF_KERNEL_H
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#define S390_CPUMCF_DIAG_DEF 0xfeef /* Counter diagnostic entry ID */
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#define PERF_EVENT_CPUM_CF_DIAG 0xBC000 /* Event: Counter sets */
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#define PERF_EVENT_CPUM_SF_DIAG 0xBD000 /* Event: Combined-sampling */
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struct cf_ctrset_entry { /* CPU-M CF counter set entry (8 byte) */
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unsigned int def:16; /* 0-15 Data Entry Format */
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unsigned int set:16; /* 16-23 Counter set identifier */
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unsigned int ctr:16; /* 24-39 Number of stored counters */
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unsigned int res1:16; /* 40-63 Reserved */
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};
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struct cf_trailer_entry { /* CPU-M CF trailer for raw traces (64 byte) */
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/* 0 - 7 */
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union {
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struct {
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unsigned int clock_base:1; /* TOD clock base */
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unsigned int speed:1; /* CPU speed */
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/* Measurement alerts */
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unsigned int mtda:1; /* Loss of MT ctr. data alert */
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unsigned int caca:1; /* Counter auth. change alert */
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unsigned int lcda:1; /* Loss of counter data alert */
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};
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unsigned long flags; /* 0-63 All indicators */
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};
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/* 8 - 15 */
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unsigned int cfvn:16; /* 64-79 Ctr First Version */
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unsigned int csvn:16; /* 80-95 Ctr Second Version */
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unsigned int cpu_speed:32; /* 96-127 CPU speed */
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/* 16 - 23 */
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unsigned long timestamp; /* 128-191 Timestamp (TOD) */
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/* 24 - 55 */
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union {
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struct {
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unsigned long progusage1;
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unsigned long progusage2;
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unsigned long progusage3;
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unsigned long tod_base;
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};
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unsigned long progusage[4];
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};
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/* 56 - 63 */
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unsigned int mach_type:16; /* Machine type */
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unsigned int res1:16; /* Reserved */
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unsigned int res2:32; /* Reserved */
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};
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#define CPUMF_CTR_SET_BASIC 0 /* Basic Counter Set */
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#define CPUMF_CTR_SET_USER 1 /* Problem-State Counter Set */
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#define CPUMF_CTR_SET_CRYPTO 2 /* Crypto-Activity Counter Set */
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#define CPUMF_CTR_SET_EXT 3 /* Extended Counter Set */
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#define CPUMF_CTR_SET_MT_DIAG 4 /* MT-diagnostic Counter Set */
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#endif
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