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![Alistair Popple](/assets/img/avatar_default.png)
The new IBM Akebono board has a PPC476GTR SoC with an AHCI compliant SATA controller. This patch adds a compatible property for the new SoC to the AHCI platform driver. Signed-off-by: Alistair Popple <alistair@popple.id.au> Signed-off-by: Tejun Heo <tj@kernel.org> Cc: stable@vger.kernel.org
353 lines
8.2 KiB
C
353 lines
8.2 KiB
C
/*
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* AHCI SATA platform driver
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*
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* Copyright 2004-2005 Red Hat, Inc.
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* Jeff Garzik <jgarzik@pobox.com>
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* Copyright 2010 MontaVista Software, LLC.
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* Anton Vorontsov <avorontsov@ru.mvista.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*/
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#include <linux/clk.h>
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#include <linux/kernel.h>
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#include <linux/gfp.h>
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#include <linux/module.h>
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#include <linux/pm.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/libata.h>
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#include <linux/ahci_platform.h>
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#include "ahci.h"
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static void ahci_host_stop(struct ata_host *host);
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enum ahci_type {
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AHCI, /* standard platform ahci */
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IMX53_AHCI, /* ahci on i.mx53 */
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STRICT_AHCI, /* delayed DMA engine start */
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};
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static struct platform_device_id ahci_devtype[] = {
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{
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.name = "ahci",
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.driver_data = AHCI,
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}, {
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.name = "imx53-ahci",
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.driver_data = IMX53_AHCI,
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}, {
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.name = "strict-ahci",
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.driver_data = STRICT_AHCI,
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}, {
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/* sentinel */
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}
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};
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MODULE_DEVICE_TABLE(platform, ahci_devtype);
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struct ata_port_operations ahci_platform_ops = {
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.inherits = &ahci_ops,
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.host_stop = ahci_host_stop,
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};
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EXPORT_SYMBOL_GPL(ahci_platform_ops);
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static struct ata_port_operations ahci_platform_retry_srst_ops = {
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.inherits = &ahci_pmp_retry_srst_ops,
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.host_stop = ahci_host_stop,
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};
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static const struct ata_port_info ahci_port_info[] = {
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/* by features */
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[AHCI] = {
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.flags = AHCI_FLAG_COMMON,
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.pio_mask = ATA_PIO4,
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.udma_mask = ATA_UDMA6,
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.port_ops = &ahci_platform_ops,
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},
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[IMX53_AHCI] = {
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.flags = AHCI_FLAG_COMMON,
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.pio_mask = ATA_PIO4,
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.udma_mask = ATA_UDMA6,
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.port_ops = &ahci_platform_retry_srst_ops,
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},
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[STRICT_AHCI] = {
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AHCI_HFLAGS (AHCI_HFLAG_DELAY_ENGINE),
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.flags = AHCI_FLAG_COMMON,
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.pio_mask = ATA_PIO4,
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.udma_mask = ATA_UDMA6,
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.port_ops = &ahci_platform_ops,
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},
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};
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static struct scsi_host_template ahci_platform_sht = {
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AHCI_SHT("ahci_platform"),
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};
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static int ahci_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct ahci_platform_data *pdata = dev_get_platdata(dev);
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const struct platform_device_id *id = platform_get_device_id(pdev);
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struct ata_port_info pi = ahci_port_info[id ? id->driver_data : 0];
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const struct ata_port_info *ppi[] = { &pi, NULL };
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struct ahci_host_priv *hpriv;
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struct ata_host *host;
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struct resource *mem;
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int irq;
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int n_ports;
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int i;
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int rc;
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mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!mem) {
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dev_err(dev, "no mmio space\n");
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return -EINVAL;
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}
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irq = platform_get_irq(pdev, 0);
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if (irq <= 0) {
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dev_err(dev, "no irq\n");
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return -EINVAL;
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}
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if (pdata && pdata->ata_port_info)
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pi = *pdata->ata_port_info;
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hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL);
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if (!hpriv) {
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dev_err(dev, "can't alloc ahci_host_priv\n");
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return -ENOMEM;
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}
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hpriv->flags |= (unsigned long)pi.private_data;
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hpriv->mmio = devm_ioremap(dev, mem->start, resource_size(mem));
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if (!hpriv->mmio) {
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dev_err(dev, "can't map %pR\n", mem);
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return -ENOMEM;
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}
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hpriv->clk = clk_get(dev, NULL);
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if (IS_ERR(hpriv->clk)) {
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dev_err(dev, "can't get clock\n");
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} else {
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rc = clk_prepare_enable(hpriv->clk);
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if (rc) {
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dev_err(dev, "clock prepare enable failed");
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goto free_clk;
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}
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}
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/*
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* Some platforms might need to prepare for mmio region access,
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* which could be done in the following init call. So, the mmio
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* region shouldn't be accessed before init (if provided) has
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* returned successfully.
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*/
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if (pdata && pdata->init) {
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rc = pdata->init(dev, hpriv->mmio);
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if (rc)
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goto disable_unprepare_clk;
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}
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ahci_save_initial_config(dev, hpriv,
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pdata ? pdata->force_port_map : 0,
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pdata ? pdata->mask_port_map : 0);
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/* prepare host */
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if (hpriv->cap & HOST_CAP_NCQ)
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pi.flags |= ATA_FLAG_NCQ;
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if (hpriv->cap & HOST_CAP_PMP)
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pi.flags |= ATA_FLAG_PMP;
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ahci_set_em_messages(hpriv, &pi);
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/* CAP.NP sometimes indicate the index of the last enabled
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* port, at other times, that of the last possible port, so
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* determining the maximum port number requires looking at
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* both CAP.NP and port_map.
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*/
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n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map));
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host = ata_host_alloc_pinfo(dev, ppi, n_ports);
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if (!host) {
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rc = -ENOMEM;
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goto pdata_exit;
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}
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host->private_data = hpriv;
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if (!(hpriv->cap & HOST_CAP_SSS) || ahci_ignore_sss)
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host->flags |= ATA_HOST_PARALLEL_SCAN;
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else
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dev_info(dev, "SSS flag set, parallel bus scan disabled\n");
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if (pi.flags & ATA_FLAG_EM)
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ahci_reset_em(host);
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for (i = 0; i < host->n_ports; i++) {
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struct ata_port *ap = host->ports[i];
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ata_port_desc(ap, "mmio %pR", mem);
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ata_port_desc(ap, "port 0x%x", 0x100 + ap->port_no * 0x80);
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/* set enclosure management message type */
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if (ap->flags & ATA_FLAG_EM)
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ap->em_message_type = hpriv->em_msg_type;
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/* disabled/not-implemented port */
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if (!(hpriv->port_map & (1 << i)))
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ap->ops = &ata_dummy_port_ops;
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}
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rc = ahci_reset_controller(host);
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if (rc)
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goto pdata_exit;
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ahci_init_controller(host);
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ahci_print_info(host, "platform");
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rc = ata_host_activate(host, irq, ahci_interrupt, IRQF_SHARED,
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&ahci_platform_sht);
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if (rc)
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goto pdata_exit;
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return 0;
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pdata_exit:
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if (pdata && pdata->exit)
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pdata->exit(dev);
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disable_unprepare_clk:
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if (!IS_ERR(hpriv->clk))
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clk_disable_unprepare(hpriv->clk);
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free_clk:
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if (!IS_ERR(hpriv->clk))
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clk_put(hpriv->clk);
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return rc;
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}
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static void ahci_host_stop(struct ata_host *host)
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{
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struct device *dev = host->dev;
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struct ahci_platform_data *pdata = dev_get_platdata(dev);
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struct ahci_host_priv *hpriv = host->private_data;
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if (pdata && pdata->exit)
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pdata->exit(dev);
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if (!IS_ERR(hpriv->clk)) {
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clk_disable_unprepare(hpriv->clk);
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clk_put(hpriv->clk);
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}
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}
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#ifdef CONFIG_PM_SLEEP
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static int ahci_suspend(struct device *dev)
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{
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struct ahci_platform_data *pdata = dev_get_platdata(dev);
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struct ata_host *host = dev_get_drvdata(dev);
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struct ahci_host_priv *hpriv = host->private_data;
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void __iomem *mmio = hpriv->mmio;
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u32 ctl;
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int rc;
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if (hpriv->flags & AHCI_HFLAG_NO_SUSPEND) {
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dev_err(dev, "firmware update required for suspend/resume\n");
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return -EIO;
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}
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/*
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* AHCI spec rev1.1 section 8.3.3:
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* Software must disable interrupts prior to requesting a
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* transition of the HBA to D3 state.
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*/
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ctl = readl(mmio + HOST_CTL);
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ctl &= ~HOST_IRQ_EN;
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writel(ctl, mmio + HOST_CTL);
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readl(mmio + HOST_CTL); /* flush */
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rc = ata_host_suspend(host, PMSG_SUSPEND);
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if (rc)
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return rc;
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if (pdata && pdata->suspend)
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return pdata->suspend(dev);
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if (!IS_ERR(hpriv->clk))
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clk_disable_unprepare(hpriv->clk);
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return 0;
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}
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static int ahci_resume(struct device *dev)
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{
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struct ahci_platform_data *pdata = dev_get_platdata(dev);
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struct ata_host *host = dev_get_drvdata(dev);
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struct ahci_host_priv *hpriv = host->private_data;
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int rc;
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if (!IS_ERR(hpriv->clk)) {
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rc = clk_prepare_enable(hpriv->clk);
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if (rc) {
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dev_err(dev, "clock prepare enable failed");
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return rc;
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}
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}
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if (pdata && pdata->resume) {
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rc = pdata->resume(dev);
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if (rc)
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goto disable_unprepare_clk;
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}
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if (dev->power.power_state.event == PM_EVENT_SUSPEND) {
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rc = ahci_reset_controller(host);
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if (rc)
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goto disable_unprepare_clk;
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ahci_init_controller(host);
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}
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ata_host_resume(host);
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return 0;
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disable_unprepare_clk:
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if (!IS_ERR(hpriv->clk))
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clk_disable_unprepare(hpriv->clk);
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return rc;
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}
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#endif
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static SIMPLE_DEV_PM_OPS(ahci_pm_ops, ahci_suspend, ahci_resume);
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static const struct of_device_id ahci_of_match[] = {
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{ .compatible = "snps,spear-ahci", },
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{ .compatible = "snps,exynos5440-ahci", },
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{ .compatible = "ibm,476gtr-ahci", },
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{},
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};
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MODULE_DEVICE_TABLE(of, ahci_of_match);
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static struct platform_driver ahci_driver = {
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.probe = ahci_probe,
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.remove = ata_platform_remove_one,
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.driver = {
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.name = "ahci",
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.owner = THIS_MODULE,
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.of_match_table = ahci_of_match,
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.pm = &ahci_pm_ops,
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},
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.id_table = ahci_devtype,
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};
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module_platform_driver(ahci_driver);
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MODULE_DESCRIPTION("AHCI SATA platform driver");
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MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:ahci");
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