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f5a98f37a5
This patch adds support for PT3 PCIe cards. PT3 has an FPGA PCIe bridge chip, a TC90522 demod chip and a VA4M6JC2103 tuner module which contains two QM1D1C0042 chips for ISDB-S and two MxL301RF's for ISDB-T. It can receive and deliver 4 (2x ISDB-S, 2x ISDB-T) streams simultaneously, and a kthread is used per stream to poll incoming data, because PT3 does not have interrupts. As an antenna input for each delivery system is split in the tuner module and shared between the corresponding two tuner chips, LNB/LNA controls that the FPGA chip provides are (naturally) shared as well. The tuner chips also share the power line in the tuner module, which is controlled on/off by a GPIO pin of the demod chip. As with the demod chip and the ISDB-T tuner chip, the init sequences/register settings for those chips are not disclosed and stored in a private memory of the FPGA, PT3 driver executes the init of those chips on behalf of their drivers. Signed-off-by: Akihiro Tsukada <tskd08@gmail.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
186 lines
4.6 KiB
C
186 lines
4.6 KiB
C
/*
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* Earthsoft PT3 driver
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*
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* Copyright (C) 2014 Akihiro Tsukada <tskd08@gmail.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef PT3_H
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#define PT3_H
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#include <linux/atomic.h>
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#include <linux/types.h>
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#include "dvb_demux.h"
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#include "dvb_frontend.h"
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#include "dmxdev.h"
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#include "tc90522.h"
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#include "mxl301rf.h"
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#include "qm1d1c0042.h"
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#define DRV_NAME KBUILD_MODNAME
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#define PT3_NUM_FE 4
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/*
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* register index of the FPGA chip
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*/
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#define REG_VERSION 0x00
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#define REG_BUS 0x04
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#define REG_SYSTEM_W 0x08
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#define REG_SYSTEM_R 0x0c
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#define REG_I2C_W 0x10
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#define REG_I2C_R 0x14
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#define REG_RAM_W 0x18
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#define REG_RAM_R 0x1c
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#define REG_DMA_BASE 0x40 /* regs for FE[i] = REG_DMA_BASE + 0x18 * i */
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#define OFST_DMA_DESC_L 0x00
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#define OFST_DMA_DESC_H 0x04
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#define OFST_DMA_CTL 0x08
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#define OFST_TS_CTL 0x0c
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#define OFST_STATUS 0x10
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#define OFST_TS_ERR 0x14
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/*
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* internal buffer for I2C
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*/
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#define PT3_I2C_MAX 4091
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struct pt3_i2cbuf {
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u8 data[PT3_I2C_MAX];
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u8 tmp;
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u32 num_cmds;
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};
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/*
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* DMA things
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*/
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#define TS_PACKET_SZ 188
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/* DMA transfers must not cross 4GiB, so use one page / transfer */
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#define DATA_XFER_SZ 4096
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#define DATA_BUF_XFERS 47
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/* (num_bufs * DATA_BUF_SZ) % TS_PACKET_SZ must be 0 */
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#define DATA_BUF_SZ (DATA_BUF_XFERS * DATA_XFER_SZ)
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#define MAX_DATA_BUFS 16
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#define MIN_DATA_BUFS 2
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#define DESCS_IN_PAGE (PAGE_SIZE / sizeof(struct xfer_desc))
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#define MAX_NUM_XFERS (MAX_DATA_BUFS * DATA_BUF_XFERS)
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#define MAX_DESC_BUFS DIV_ROUND_UP(MAX_NUM_XFERS, DESCS_IN_PAGE)
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/* DMA transfer description.
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* device is passed a pointer to this struct, dma-reads it,
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* and gets the DMA buffer ring for storing TS data.
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*/
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struct xfer_desc {
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u32 addr_l; /* bus address of target data buffer */
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u32 addr_h;
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u32 size;
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u32 next_l; /* bus adddress of the next xfer_desc */
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u32 next_h;
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};
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/* A DMA mapping of a page containing xfer_desc's */
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struct xfer_desc_buffer {
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dma_addr_t b_addr;
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struct xfer_desc *descs; /* PAGE_SIZE (xfer_desc[DESCS_IN_PAGE]) */
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};
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/* A DMA mapping of a data buffer */
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struct dma_data_buffer {
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dma_addr_t b_addr;
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u8 *data; /* size: u8[PAGE_SIZE] */
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};
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/*
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* device things
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*/
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struct pt3_adap_config {
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struct i2c_board_info demod_info;
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struct tc90522_config demod_cfg;
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struct i2c_board_info tuner_info;
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union tuner_config {
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struct qm1d1c0042_config qm1d1c0042;
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struct mxl301rf_config mxl301rf;
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} tuner_cfg;
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u32 init_freq;
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};
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struct pt3_adapter {
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struct dvb_adapter dvb_adap; /* dvb_adap.priv => struct pt3_board */
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int adap_idx;
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struct dvb_demux demux;
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struct dmxdev dmxdev;
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struct dvb_frontend *fe;
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struct i2c_client *i2c_demod;
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struct i2c_client *i2c_tuner;
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/* data fetch thread */
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struct task_struct *thread;
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int num_feeds;
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bool cur_lna;
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bool cur_lnb; /* current LNB power status (on/off) */
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/* items below are for DMA */
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struct dma_data_buffer buffer[MAX_DATA_BUFS];
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int buf_idx;
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int buf_ofs;
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int num_bufs; /* == pt3_board->num_bufs */
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int num_discard; /* how many access units to discard initially */
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struct xfer_desc_buffer desc_buf[MAX_DESC_BUFS];
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int num_desc_bufs; /* == num_bufs * DATA_BUF_XFERS / DESCS_IN_PAGE */
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};
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struct pt3_board {
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struct pci_dev *pdev;
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void __iomem *regs[2];
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/* regs[0]: registers, regs[1]: internal memory, used for I2C */
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struct mutex lock;
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/* LNB power shared among sat-FEs */
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int lnb_on_cnt; /* LNB power on count */
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/* LNA shared among terr-FEs */
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int lna_on_cnt; /* booster enabled count */
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int num_bufs; /* number of DMA buffers allocated/mapped per FE */
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struct i2c_adapter i2c_adap;
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struct pt3_i2cbuf *i2c_buf;
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struct pt3_adapter *adaps[PT3_NUM_FE];
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};
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/*
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* prototypes
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*/
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extern int pt3_alloc_dmabuf(struct pt3_adapter *adap);
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extern void pt3_init_dmabuf(struct pt3_adapter *adap);
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extern void pt3_free_dmabuf(struct pt3_adapter *adap);
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extern int pt3_start_dma(struct pt3_adapter *adap);
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extern int pt3_stop_dma(struct pt3_adapter *adap);
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extern int pt3_proc_dma(struct pt3_adapter *adap);
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extern int pt3_i2c_master_xfer(struct i2c_adapter *adap,
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struct i2c_msg *msgs, int num);
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extern u32 pt3_i2c_functionality(struct i2c_adapter *adap);
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extern void pt3_i2c_reset(struct pt3_board *pt3);
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extern int pt3_init_all_demods(struct pt3_board *pt3);
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extern int pt3_init_all_mxl301rf(struct pt3_board *pt3);
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#endif /* PT3_H */
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