mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-12 13:55:32 +00:00
![]() The i8253 clockevent & clocksource driver uses PIT_LATCH except for two cases where it uses LATCH: 1) /* VIA686a test code... reset the latch if count > max + 1 */ if (count > LATCH) { LATCH is based on CLOCK_TICK_RATE which is defined as PIT_TICK_RATE on x86 so this should just be the later. 2) ... switch (mode) { case CLOCK_EVT_MODE_PERIODIC: /* binary, mode 2, LSB/MSB, ch 0 */ outb_p(0x34, PIT_MODE); outb_p(LATCH & 0xff , PIT_CH0); /* LSB */ outb_p(LATCH >> 8 , PIT_CH0); /* MSB */ ... MIPS and ARM are the only other arches that use this driver. In the MIPS case CLOCK_TICK_RATE is defined as the same value as PIT_TICK_RATE. For ARM, the only machine that uses it is Footbridge which has a totally bogus CLOCK_TICK_RATE according to the comments. Furthermore, the clockevent_i8253_init() initializes the clockevent with PIT_TIC_RATE, so there's no reason to use the generic LATCH. This is part of work to remove and depecrate the global CLOCK_TICK_RATE symbol. Signed-off-by: Deepak Saxena <dsaxena@linaro.org> Signed-off-by: John Stultz <john.stultz@linaro.org> |
||
---|---|---|
.. | ||
acpi_pm.c | ||
cs5535-clockevt.c | ||
cyclone.c | ||
dw_apb_timer.c | ||
i8253.c | ||
Kconfig | ||
Makefile | ||
mmio.c | ||
scx200_hrt.c | ||
sh_cmt.c | ||
sh_mtu2.c | ||
sh_tmu.c | ||
tcb_clksrc.c |