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![Finn Thain](/assets/img/avatar_default.png)
The IOP interrupt handler iop_ism_irq() is used by the adb-iop driver to poll for ADB request completion. Unfortunately, it is not re-entrant. Fix the race condition by adding an iop_ism_irq_poll() function with suitable mutual exclusion. Tested-by: Stan Johnson <userm57@yahoo.com> Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
609 lines
18 KiB
C
609 lines
18 KiB
C
/*
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* I/O Processor (IOP) management
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* Written and (C) 1999 by Joshua M. Thompson (funaho@jurai.org)
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice and this list of conditions.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice and this list of conditions in the documentation and/or other
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* materials provided with the distribution.
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*/
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/*
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* The IOP chips are used in the IIfx and some Quadras (900, 950) to manage
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* serial and ADB. They are actually a 6502 processor and some glue logic.
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*
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* 990429 (jmt) - Initial implementation, just enough to knock the SCC IOP
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* into compatible mode so nobody has to fiddle with the
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* Serial Switch control panel anymore.
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* 990603 (jmt) - Added code to grab the correct ISM IOP interrupt for OSS
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* and non-OSS machines (at least I hope it's correct on a
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* non-OSS machine -- someone with a Q900 or Q950 needs to
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* check this.)
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* 990605 (jmt) - Rearranged things a bit wrt IOP detection; iop_present is
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* gone, IOP base addresses are now in an array and the
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* globally-visible functions take an IOP number instead of an
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* an actual base address.
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* 990610 (jmt) - Finished the message passing framework and it seems to work.
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* Sending _definitely_ works; my adb-bus.c mods can send
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* messages and receive the MSG_COMPLETED status back from the
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* IOP. The trick now is figuring out the message formats.
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* 990611 (jmt) - More cleanups. Fixed problem where unclaimed messages on a
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* receive channel were never properly acknowledged. Bracketed
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* the remaining debug printk's with #ifdef's and disabled
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* debugging. I can now type on the console.
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* 990612 (jmt) - Copyright notice added. Reworked the way replies are handled.
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* It turns out that replies are placed back in the send buffer
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* for that channel; messages on the receive channels are always
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* unsolicited messages from the IOP (and our replies to them
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* should go back in the receive channel.) Also added tracking
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* of device names to the listener functions ala the interrupt
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* handlers.
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* 990729 (jmt) - Added passing of pt_regs structure to IOP handlers. This is
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* used by the new unified ADB driver.
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*
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* TODO:
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*
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* o Something should be periodically checking iop_alive() to make sure the
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* IOP hasn't died.
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* o Some of the IOP manager routines need better error checking and
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* return codes. Nothing major, just prettying up.
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*/
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/*
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* -----------------------
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* IOP Message Passing 101
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* -----------------------
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*
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* The host talks to the IOPs using a rather simple message-passing scheme via
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* a shared memory area in the IOP RAM. Each IOP has seven "channels"; each
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* channel is connected to a specific software driver on the IOP. For example
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* on the SCC IOP there is one channel for each serial port. Each channel has
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* an incoming and and outgoing message queue with a depth of one.
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*
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* A message is 32 bytes plus a state byte for the channel (MSG_IDLE, MSG_NEW,
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* MSG_RCVD, MSG_COMPLETE). To send a message you copy the message into the
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* buffer, set the state to MSG_NEW and signal the IOP by setting the IRQ flag
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* in the IOP control to 1. The IOP will move the state to MSG_RCVD when it
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* receives the message and then to MSG_COMPLETE when the message processing
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* has completed. It is the host's responsibility at that point to read the
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* reply back out of the send channel buffer and reset the channel state back
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* to MSG_IDLE.
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*
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* To receive message from the IOP the same procedure is used except the roles
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* are reversed. That is, the IOP puts message in the channel with a state of
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* MSG_NEW, and the host receives the message and move its state to MSG_RCVD
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* and then to MSG_COMPLETE when processing is completed and the reply (if any)
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* has been placed back in the receive channel. The IOP will then reset the
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* channel state to MSG_IDLE.
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*
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* Two sets of host interrupts are provided, INT0 and INT1. Both appear on one
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* interrupt level; they are distinguished by a pair of bits in the IOP status
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* register. The IOP will raise INT0 when one or more messages in the send
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* channels have gone to the MSG_COMPLETE state and it will raise INT1 when one
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* or more messages on the receive channels have gone to the MSG_NEW state.
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*
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* Since each channel handles only one message we have to implement a small
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* interrupt-driven queue on our end. Messages to be sent are placed on the
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* queue for sending and contain a pointer to an optional callback function.
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* The handler for a message is called when the message state goes to
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* MSG_COMPLETE.
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*
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* For receiving message we maintain a list of handler functions to call when
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* a message is received on that IOP/channel combination. The handlers are
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* called much like an interrupt handler and are passed a copy of the message
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* from the IOP. The message state will be in MSG_RCVD while the handler runs;
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* it is the handler's responsibility to call iop_complete_message() when
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* finished; this function moves the message state to MSG_COMPLETE and signals
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* the IOP. This two-step process is provided to allow the handler to defer
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* message processing to a bottom-half handler if the processing will take
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* a significant amount of time (handlers are called at interrupt time so they
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* should execute quickly.)
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*/
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <asm/macintosh.h>
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#include <asm/macints.h>
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#include <asm/mac_iop.h>
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#ifdef DEBUG
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#define iop_pr_debug(fmt, ...) \
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printk(KERN_DEBUG "%s: " fmt, __func__, ##__VA_ARGS__)
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#define iop_pr_cont(fmt, ...) \
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printk(KERN_CONT fmt, ##__VA_ARGS__)
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#else
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#define iop_pr_debug(fmt, ...) \
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no_printk(KERN_DEBUG "%s: " fmt, __func__, ##__VA_ARGS__)
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#define iop_pr_cont(fmt, ...) \
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no_printk(KERN_CONT fmt, ##__VA_ARGS__)
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#endif
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/* Non-zero if the IOPs are present */
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int iop_scc_present, iop_ism_present;
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/* structure for tracking channel listeners */
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struct listener {
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const char *devname;
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void (*handler)(struct iop_msg *);
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};
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/*
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* IOP structures for the two IOPs
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*
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* The SCC IOP controls both serial ports (A and B) as its two functions.
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* The ISM IOP controls the SWIM (floppy drive) and ADB.
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*/
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static volatile struct mac_iop *iop_base[NUM_IOPS];
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/*
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* IOP message queues
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*/
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static struct iop_msg iop_msg_pool[NUM_IOP_MSGS];
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static struct iop_msg *iop_send_queue[NUM_IOPS][NUM_IOP_CHAN];
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static struct listener iop_listeners[NUM_IOPS][NUM_IOP_CHAN];
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irqreturn_t iop_ism_irq(int, void *);
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/*
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* Private access functions
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*/
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static __inline__ void iop_loadaddr(volatile struct mac_iop *iop, __u16 addr)
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{
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iop->ram_addr_lo = addr;
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iop->ram_addr_hi = addr >> 8;
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}
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static __inline__ __u8 iop_readb(volatile struct mac_iop *iop, __u16 addr)
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{
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iop->ram_addr_lo = addr;
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iop->ram_addr_hi = addr >> 8;
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return iop->ram_data;
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}
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static __inline__ void iop_writeb(volatile struct mac_iop *iop, __u16 addr, __u8 data)
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{
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iop->ram_addr_lo = addr;
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iop->ram_addr_hi = addr >> 8;
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iop->ram_data = data;
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}
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static __inline__ void iop_stop(volatile struct mac_iop *iop)
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{
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iop->status_ctrl &= ~IOP_RUN;
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}
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static __inline__ void iop_start(volatile struct mac_iop *iop)
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{
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iop->status_ctrl = IOP_RUN | IOP_AUTOINC;
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}
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static __inline__ void iop_bypass(volatile struct mac_iop *iop)
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{
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iop->status_ctrl |= IOP_BYPASS;
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}
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static __inline__ void iop_interrupt(volatile struct mac_iop *iop)
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{
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iop->status_ctrl |= IOP_IRQ;
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}
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static int iop_alive(volatile struct mac_iop *iop)
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{
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int retval;
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retval = (iop_readb(iop, IOP_ADDR_ALIVE) == 0xFF);
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iop_writeb(iop, IOP_ADDR_ALIVE, 0);
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return retval;
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}
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static struct iop_msg *iop_get_unused_msg(void)
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{
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int i;
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unsigned long flags;
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local_irq_save(flags);
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for (i = 0 ; i < NUM_IOP_MSGS ; i++) {
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if (iop_msg_pool[i].status == IOP_MSGSTATUS_UNUSED) {
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iop_msg_pool[i].status = IOP_MSGSTATUS_WAITING;
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local_irq_restore(flags);
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return &iop_msg_pool[i];
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}
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}
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local_irq_restore(flags);
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return NULL;
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}
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/*
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* This is called by the startup code before anything else. Its purpose
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* is to find and initialize the IOPs early in the boot sequence, so that
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* the serial IOP can be placed into bypass mode _before_ we try to
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* initialize the serial console.
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*/
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void __init iop_preinit(void)
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{
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if (macintosh_config->scc_type == MAC_SCC_IOP) {
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if (macintosh_config->ident == MAC_MODEL_IIFX) {
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iop_base[IOP_NUM_SCC] = (struct mac_iop *) SCC_IOP_BASE_IIFX;
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} else {
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iop_base[IOP_NUM_SCC] = (struct mac_iop *) SCC_IOP_BASE_QUADRA;
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}
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iop_base[IOP_NUM_SCC]->status_ctrl = 0x87;
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iop_scc_present = 1;
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} else {
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iop_base[IOP_NUM_SCC] = NULL;
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iop_scc_present = 0;
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}
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if (macintosh_config->adb_type == MAC_ADB_IOP) {
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if (macintosh_config->ident == MAC_MODEL_IIFX) {
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iop_base[IOP_NUM_ISM] = (struct mac_iop *) ISM_IOP_BASE_IIFX;
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} else {
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iop_base[IOP_NUM_ISM] = (struct mac_iop *) ISM_IOP_BASE_QUADRA;
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}
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iop_base[IOP_NUM_ISM]->status_ctrl = 0;
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iop_ism_present = 1;
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} else {
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iop_base[IOP_NUM_ISM] = NULL;
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iop_ism_present = 0;
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}
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}
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/*
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* Initialize the IOPs, if present.
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*/
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void __init iop_init(void)
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{
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int i;
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if (iop_scc_present) {
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pr_debug("SCC IOP detected at %p\n", iop_base[IOP_NUM_SCC]);
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}
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if (iop_ism_present) {
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pr_debug("ISM IOP detected at %p\n", iop_base[IOP_NUM_ISM]);
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iop_start(iop_base[IOP_NUM_ISM]);
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iop_alive(iop_base[IOP_NUM_ISM]); /* clears the alive flag */
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}
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/* Make the whole pool available and empty the queues */
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for (i = 0 ; i < NUM_IOP_MSGS ; i++) {
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iop_msg_pool[i].status = IOP_MSGSTATUS_UNUSED;
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}
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for (i = 0 ; i < NUM_IOP_CHAN ; i++) {
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iop_send_queue[IOP_NUM_SCC][i] = NULL;
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iop_send_queue[IOP_NUM_ISM][i] = NULL;
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iop_listeners[IOP_NUM_SCC][i].devname = NULL;
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iop_listeners[IOP_NUM_SCC][i].handler = NULL;
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iop_listeners[IOP_NUM_ISM][i].devname = NULL;
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iop_listeners[IOP_NUM_ISM][i].handler = NULL;
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}
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}
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/*
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* Register the interrupt handler for the IOPs.
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* TODO: might be wrong for non-OSS machines. Anyone?
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*/
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void __init iop_register_interrupts(void)
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{
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if (iop_ism_present) {
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if (macintosh_config->ident == MAC_MODEL_IIFX) {
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if (request_irq(IRQ_MAC_ADB, iop_ism_irq, 0,
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"ISM IOP", (void *)IOP_NUM_ISM))
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pr_err("Couldn't register ISM IOP interrupt\n");
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} else {
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if (request_irq(IRQ_VIA2_0, iop_ism_irq, 0, "ISM IOP",
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(void *)IOP_NUM_ISM))
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pr_err("Couldn't register ISM IOP interrupt\n");
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}
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if (!iop_alive(iop_base[IOP_NUM_ISM])) {
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pr_warn("IOP: oh my god, they killed the ISM IOP!\n");
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} else {
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pr_warn("IOP: the ISM IOP seems to be alive.\n");
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}
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}
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}
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/*
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* Register or unregister a listener for a specific IOP and channel
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*
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* If the handler pointer is NULL the current listener (if any) is
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* unregistered. Otherwise the new listener is registered provided
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* there is no existing listener registered.
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*/
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int iop_listen(uint iop_num, uint chan,
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void (*handler)(struct iop_msg *),
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const char *devname)
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{
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if ((iop_num >= NUM_IOPS) || !iop_base[iop_num]) return -EINVAL;
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if (chan >= NUM_IOP_CHAN) return -EINVAL;
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if (iop_listeners[iop_num][chan].handler && handler) return -EINVAL;
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iop_listeners[iop_num][chan].devname = devname;
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iop_listeners[iop_num][chan].handler = handler;
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return 0;
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}
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/*
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* Complete reception of a message, which just means copying the reply
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* into the buffer, setting the channel state to MSG_COMPLETE and
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* notifying the IOP.
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*/
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void iop_complete_message(struct iop_msg *msg)
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{
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int iop_num = msg->iop_num;
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int chan = msg->channel;
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int i,offset;
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iop_pr_debug("msg %p iop_num %d channel %d\n", msg, msg->iop_num,
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msg->channel);
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offset = IOP_ADDR_RECV_MSG + (msg->channel * IOP_MSG_LEN);
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for (i = 0 ; i < IOP_MSG_LEN ; i++, offset++) {
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iop_writeb(iop_base[iop_num], offset, msg->reply[i]);
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}
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iop_writeb(iop_base[iop_num],
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IOP_ADDR_RECV_STATE + chan, IOP_MSG_COMPLETE);
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iop_interrupt(iop_base[msg->iop_num]);
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msg->status = IOP_MSGSTATUS_UNUSED;
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}
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/*
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* Actually put a message into a send channel buffer
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*/
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static void iop_do_send(struct iop_msg *msg)
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{
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volatile struct mac_iop *iop = iop_base[msg->iop_num];
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int i,offset;
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offset = IOP_ADDR_SEND_MSG + (msg->channel * IOP_MSG_LEN);
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for (i = 0 ; i < IOP_MSG_LEN ; i++, offset++) {
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iop_writeb(iop, offset, msg->message[i]);
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}
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iop_writeb(iop, IOP_ADDR_SEND_STATE + msg->channel, IOP_MSG_NEW);
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iop_interrupt(iop);
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}
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/*
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* Handle sending a message on a channel that
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* has gone into the IOP_MSG_COMPLETE state.
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*/
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static void iop_handle_send(uint iop_num, uint chan)
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{
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volatile struct mac_iop *iop = iop_base[iop_num];
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struct iop_msg *msg;
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int i,offset;
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iop_pr_debug("iop_num %d chan %d\n", iop_num, chan);
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iop_writeb(iop, IOP_ADDR_SEND_STATE + chan, IOP_MSG_IDLE);
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if (!(msg = iop_send_queue[iop_num][chan])) return;
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msg->status = IOP_MSGSTATUS_COMPLETE;
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offset = IOP_ADDR_SEND_MSG + (chan * IOP_MSG_LEN);
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for (i = 0 ; i < IOP_MSG_LEN ; i++, offset++) {
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msg->reply[i] = iop_readb(iop, offset);
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}
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if (msg->handler) (*msg->handler)(msg);
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msg->status = IOP_MSGSTATUS_UNUSED;
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msg = msg->next;
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iop_send_queue[iop_num][chan] = msg;
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if (msg) iop_do_send(msg);
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}
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/*
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* Handle reception of a message on a channel that has
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* gone into the IOP_MSG_NEW state.
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*/
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static void iop_handle_recv(uint iop_num, uint chan)
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{
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volatile struct mac_iop *iop = iop_base[iop_num];
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int i,offset;
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struct iop_msg *msg;
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iop_pr_debug("iop_num %d chan %d\n", iop_num, chan);
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msg = iop_get_unused_msg();
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msg->iop_num = iop_num;
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msg->channel = chan;
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msg->status = IOP_MSGSTATUS_UNSOL;
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msg->handler = iop_listeners[iop_num][chan].handler;
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offset = IOP_ADDR_RECV_MSG + (chan * IOP_MSG_LEN);
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for (i = 0 ; i < IOP_MSG_LEN ; i++, offset++) {
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msg->message[i] = iop_readb(iop, offset);
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}
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iop_writeb(iop, IOP_ADDR_RECV_STATE + chan, IOP_MSG_RCVD);
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/* If there is a listener, call it now. Otherwise complete */
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/* the message ourselves to avoid possible stalls. */
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if (msg->handler) {
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(*msg->handler)(msg);
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} else {
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iop_pr_debug("unclaimed message on iop_num %d chan %d\n",
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iop_num, chan);
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iop_pr_debug("%*ph\n", IOP_MSG_LEN, msg->message);
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iop_complete_message(msg);
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}
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}
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/*
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* Send a message
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*
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* The message is placed at the end of the send queue. Afterwards if the
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* channel is idle we force an immediate send of the next message in the
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* queue.
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*/
|
|
|
|
int iop_send_message(uint iop_num, uint chan, void *privdata,
|
|
uint msg_len, __u8 *msg_data,
|
|
void (*handler)(struct iop_msg *))
|
|
{
|
|
struct iop_msg *msg, *q;
|
|
|
|
if ((iop_num >= NUM_IOPS) || !iop_base[iop_num]) return -EINVAL;
|
|
if (chan >= NUM_IOP_CHAN) return -EINVAL;
|
|
if (msg_len > IOP_MSG_LEN) return -EINVAL;
|
|
|
|
msg = iop_get_unused_msg();
|
|
if (!msg) return -ENOMEM;
|
|
|
|
msg->next = NULL;
|
|
msg->status = IOP_MSGSTATUS_WAITING;
|
|
msg->iop_num = iop_num;
|
|
msg->channel = chan;
|
|
msg->caller_priv = privdata;
|
|
memcpy(msg->message, msg_data, msg_len);
|
|
msg->handler = handler;
|
|
|
|
if (!(q = iop_send_queue[iop_num][chan])) {
|
|
iop_send_queue[iop_num][chan] = msg;
|
|
} else {
|
|
while (q->next) q = q->next;
|
|
q->next = msg;
|
|
}
|
|
|
|
if (iop_readb(iop_base[iop_num],
|
|
IOP_ADDR_SEND_STATE + chan) == IOP_MSG_IDLE) {
|
|
iop_do_send(msg);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Upload code to the shared RAM of an IOP.
|
|
*/
|
|
|
|
void iop_upload_code(uint iop_num, __u8 *code_start,
|
|
uint code_len, __u16 shared_ram_start)
|
|
{
|
|
if ((iop_num >= NUM_IOPS) || !iop_base[iop_num]) return;
|
|
|
|
iop_loadaddr(iop_base[iop_num], shared_ram_start);
|
|
|
|
while (code_len--) {
|
|
iop_base[iop_num]->ram_data = *code_start++;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Download code from the shared RAM of an IOP.
|
|
*/
|
|
|
|
void iop_download_code(uint iop_num, __u8 *code_start,
|
|
uint code_len, __u16 shared_ram_start)
|
|
{
|
|
if ((iop_num >= NUM_IOPS) || !iop_base[iop_num]) return;
|
|
|
|
iop_loadaddr(iop_base[iop_num], shared_ram_start);
|
|
|
|
while (code_len--) {
|
|
*code_start++ = iop_base[iop_num]->ram_data;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Compare the code in the shared RAM of an IOP with a copy in system memory
|
|
* and return 0 on match or the first nonmatching system memory address on
|
|
* failure.
|
|
*/
|
|
|
|
__u8 *iop_compare_code(uint iop_num, __u8 *code_start,
|
|
uint code_len, __u16 shared_ram_start)
|
|
{
|
|
if ((iop_num >= NUM_IOPS) || !iop_base[iop_num]) return code_start;
|
|
|
|
iop_loadaddr(iop_base[iop_num], shared_ram_start);
|
|
|
|
while (code_len--) {
|
|
if (*code_start != iop_base[iop_num]->ram_data) {
|
|
return code_start;
|
|
}
|
|
code_start++;
|
|
}
|
|
return (__u8 *) 0;
|
|
}
|
|
|
|
/*
|
|
* Handle an ISM IOP interrupt
|
|
*/
|
|
|
|
irqreturn_t iop_ism_irq(int irq, void *dev_id)
|
|
{
|
|
uint iop_num = (uint) dev_id;
|
|
volatile struct mac_iop *iop = iop_base[iop_num];
|
|
int i,state;
|
|
|
|
iop_pr_debug("status %02X\n", iop->status_ctrl);
|
|
|
|
/* INT0 indicates a state change on an outgoing message channel */
|
|
|
|
if (iop->status_ctrl & IOP_INT0) {
|
|
iop->status_ctrl = IOP_INT0 | IOP_RUN | IOP_AUTOINC;
|
|
iop_pr_debug("new status %02X, send states", iop->status_ctrl);
|
|
for (i = 0 ; i < NUM_IOP_CHAN ; i++) {
|
|
state = iop_readb(iop, IOP_ADDR_SEND_STATE + i);
|
|
iop_pr_cont(" %02X", state);
|
|
if (state == IOP_MSG_COMPLETE) {
|
|
iop_handle_send(iop_num, i);
|
|
}
|
|
}
|
|
iop_pr_cont("\n");
|
|
}
|
|
|
|
if (iop->status_ctrl & IOP_INT1) { /* INT1 for incoming msgs */
|
|
iop->status_ctrl = IOP_INT1 | IOP_RUN | IOP_AUTOINC;
|
|
iop_pr_debug("new status %02X, recv states", iop->status_ctrl);
|
|
for (i = 0 ; i < NUM_IOP_CHAN ; i++) {
|
|
state = iop_readb(iop, IOP_ADDR_RECV_STATE + i);
|
|
iop_pr_cont(" %02X", state);
|
|
if (state == IOP_MSG_NEW) {
|
|
iop_handle_recv(iop_num, i);
|
|
}
|
|
}
|
|
iop_pr_cont("\n");
|
|
}
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
void iop_ism_irq_poll(uint iop_num)
|
|
{
|
|
unsigned long flags;
|
|
|
|
local_irq_save(flags);
|
|
iop_ism_irq(0, (void *)iop_num);
|
|
local_irq_restore(flags);
|
|
}
|