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![Thomas Gleixner](/assets/img/avatar_default.png)
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
188 lines
3.2 KiB
C
188 lines
3.2 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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*
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* Copyright (C) 2010 Thomas Langer <thomas.langer@lantiq.com>
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* Copyright (C) 2010 John Crispin <john@phrozen.org>
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*/
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#include <linux/io.h>
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#include <linux/export.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/clk.h>
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#include <linux/clkdev.h>
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#include <linux/err.h>
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#include <linux/list.h>
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#include <asm/time.h>
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#include <asm/irq.h>
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#include <asm/div64.h>
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#include <lantiq_soc.h>
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#include "clk.h"
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#include "prom.h"
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/* lantiq socs have 3 static clocks */
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static struct clk cpu_clk_generic[4];
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void clkdev_add_static(unsigned long cpu, unsigned long fpi,
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unsigned long io, unsigned long ppe)
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{
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cpu_clk_generic[0].rate = cpu;
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cpu_clk_generic[1].rate = fpi;
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cpu_clk_generic[2].rate = io;
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cpu_clk_generic[3].rate = ppe;
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}
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struct clk *clk_get_cpu(void)
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{
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return &cpu_clk_generic[0];
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}
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struct clk *clk_get_fpi(void)
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{
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return &cpu_clk_generic[1];
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}
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EXPORT_SYMBOL_GPL(clk_get_fpi);
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struct clk *clk_get_io(void)
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{
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return &cpu_clk_generic[2];
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}
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struct clk *clk_get_ppe(void)
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{
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return &cpu_clk_generic[3];
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}
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EXPORT_SYMBOL_GPL(clk_get_ppe);
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static inline int clk_good(struct clk *clk)
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{
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return clk && !IS_ERR(clk);
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}
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unsigned long clk_get_rate(struct clk *clk)
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{
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if (unlikely(!clk_good(clk)))
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return 0;
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if (clk->rate != 0)
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return clk->rate;
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if (clk->get_rate != NULL)
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return clk->get_rate();
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return 0;
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}
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EXPORT_SYMBOL(clk_get_rate);
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int clk_set_rate(struct clk *clk, unsigned long rate)
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{
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if (unlikely(!clk_good(clk)))
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return 0;
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if (clk->rates && *clk->rates) {
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unsigned long *r = clk->rates;
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while (*r && (*r != rate))
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r++;
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if (!*r) {
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pr_err("clk %s.%s: trying to set invalid rate %ld\n",
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clk->cl.dev_id, clk->cl.con_id, rate);
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return -1;
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}
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}
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clk->rate = rate;
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return 0;
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}
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EXPORT_SYMBOL(clk_set_rate);
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long clk_round_rate(struct clk *clk, unsigned long rate)
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{
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if (unlikely(!clk_good(clk)))
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return 0;
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if (clk->rates && *clk->rates) {
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unsigned long *r = clk->rates;
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while (*r && (*r != rate))
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r++;
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if (!*r) {
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return clk->rate;
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}
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}
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return rate;
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}
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EXPORT_SYMBOL(clk_round_rate);
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int clk_enable(struct clk *clk)
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{
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if (unlikely(!clk_good(clk)))
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return -1;
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if (clk->enable)
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return clk->enable(clk);
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return -1;
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}
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EXPORT_SYMBOL(clk_enable);
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void clk_disable(struct clk *clk)
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{
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if (unlikely(!clk_good(clk)))
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return;
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if (clk->disable)
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clk->disable(clk);
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}
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EXPORT_SYMBOL(clk_disable);
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int clk_activate(struct clk *clk)
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{
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if (unlikely(!clk_good(clk)))
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return -1;
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if (clk->activate)
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return clk->activate(clk);
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return -1;
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}
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EXPORT_SYMBOL(clk_activate);
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void clk_deactivate(struct clk *clk)
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{
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if (unlikely(!clk_good(clk)))
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return;
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if (clk->deactivate)
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clk->deactivate(clk);
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}
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EXPORT_SYMBOL(clk_deactivate);
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static inline u32 get_counter_resolution(void)
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{
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u32 res;
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__asm__ __volatile__(
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".set push\n"
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".set mips32r2\n"
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"rdhwr %0, $3\n"
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".set pop\n"
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: "=&r" (res)
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: /* no input */
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: "memory");
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return res;
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}
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void __init plat_time_init(void)
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{
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struct clk *clk;
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ltq_soc_init();
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clk = clk_get_cpu();
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mips_hpt_frequency = clk_get_rate(clk) / get_counter_resolution();
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write_c0_compare(read_c0_count());
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pr_info("CPU Clock: %ldMHz\n", clk_get_rate(clk) / 1000000);
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clk_put(clk);
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}
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