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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
157 lines
3 KiB
C
157 lines
3 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* loongson-specific suspend support
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*
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* Copyright (C) 2009 Lemote Inc.
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* Author: Wu Zhangjin <wuzhangjin@gmail.com>
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*/
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#include <linux/suspend.h>
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#include <linux/interrupt.h>
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#include <linux/pm.h>
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#include <asm/i8259.h>
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#include <asm/mipsregs.h>
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#include <loongson.h>
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static unsigned int __maybe_unused cached_master_mask; /* i8259A */
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static unsigned int __maybe_unused cached_slave_mask;
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static unsigned int __maybe_unused cached_bonito_irq_mask; /* bonito */
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void arch_suspend_disable_irqs(void)
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{
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/* disable all mips events */
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local_irq_disable();
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#ifdef CONFIG_I8259
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/* disable all events of i8259A */
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cached_slave_mask = inb(PIC_SLAVE_IMR);
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cached_master_mask = inb(PIC_MASTER_IMR);
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outb(0xff, PIC_SLAVE_IMR);
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inb(PIC_SLAVE_IMR);
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outb(0xff, PIC_MASTER_IMR);
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inb(PIC_MASTER_IMR);
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#endif
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/* disable all events of bonito */
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cached_bonito_irq_mask = LOONGSON_INTEN;
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LOONGSON_INTENCLR = 0xffff;
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(void)LOONGSON_INTENCLR;
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}
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void arch_suspend_enable_irqs(void)
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{
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/* enable all mips events */
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local_irq_enable();
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#ifdef CONFIG_I8259
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/* only enable the cached events of i8259A */
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outb(cached_slave_mask, PIC_SLAVE_IMR);
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outb(cached_master_mask, PIC_MASTER_IMR);
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#endif
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/* enable all cached events of bonito */
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LOONGSON_INTENSET = cached_bonito_irq_mask;
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(void)LOONGSON_INTENSET;
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}
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/*
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* Setup the board-specific events for waking up loongson from wait mode
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*/
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void __weak setup_wakeup_events(void)
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{
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}
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/*
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* Check wakeup events
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*/
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int __weak wakeup_loongson(void)
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{
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return 1;
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}
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/*
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* If the events are really what we want to wakeup the CPU, wake it up
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* otherwise put the CPU asleep again.
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*/
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static void wait_for_wakeup_events(void)
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{
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while (!wakeup_loongson())
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LOONGSON_CHIPCFG(0) &= ~0x7;
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}
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/*
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* Stop all perf counters
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*
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* $24 is the control register of Loongson perf counter
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*/
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static inline void stop_perf_counters(void)
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{
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__write_64bit_c0_register($24, 0, 0);
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}
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static void loongson_suspend_enter(void)
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{
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static unsigned int cached_cpu_freq;
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/* setup wakeup events via enabling the IRQs */
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setup_wakeup_events();
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stop_perf_counters();
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cached_cpu_freq = LOONGSON_CHIPCFG(0);
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/* Put CPU into wait mode */
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LOONGSON_CHIPCFG(0) &= ~0x7;
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/* wait for the given events to wakeup cpu from wait mode */
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wait_for_wakeup_events();
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LOONGSON_CHIPCFG(0) = cached_cpu_freq;
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mmiowb();
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}
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void __weak mach_suspend(void)
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{
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}
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void __weak mach_resume(void)
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{
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}
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static int loongson_pm_enter(suspend_state_t state)
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{
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mach_suspend();
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/* processor specific suspend */
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loongson_suspend_enter();
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mach_resume();
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return 0;
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}
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static int loongson_pm_valid_state(suspend_state_t state)
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{
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switch (state) {
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case PM_SUSPEND_ON:
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case PM_SUSPEND_STANDBY:
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case PM_SUSPEND_MEM:
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return 1;
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default:
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return 0;
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}
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}
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static const struct platform_suspend_ops loongson_pm_ops = {
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.valid = loongson_pm_valid_state,
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.enter = loongson_pm_enter,
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};
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static int __init loongson_pm_init(void)
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{
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suspend_set_ops(&loongson_pm_ops);
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return 0;
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}
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arch_initcall(loongson_pm_init);
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