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![Greg Kroah-Hartman](/assets/img/avatar_default.png)
It's good to have SPDX identifiers in all files to make it easier to audit the kernel tree for correct licenses. Update the drivers/tty files files with the correct SPDX license identifier based on the license text in the file itself. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This work is based on a script and data from Thomas Gleixner, Philippe Ombredanne, and Kate Stewart. Cc: Jiri Slaby <jslaby@suse.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Chris Metcalf <cmetcalf@mellanox.com> Cc: Jiri Kosina <jikos@kernel.org> Cc: David Sterba <dsterba@suse.com> Cc: James Hogan <jhogan@kernel.org> Cc: Rob Herring <robh@kernel.org> Cc: Eric Anholt <eric@anholt.net> Cc: Stefan Wahren <stefan.wahren@i2se.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Ray Jui <rjui@broadcom.com> Cc: Scott Branden <sbranden@broadcom.com> Cc: bcm-kernel-feedback-list@broadcom.com Cc: "James E.J. Bottomley" <jejb@parisc-linux.org> Cc: Helge Deller <deller@gmx.de> Cc: Joachim Eastwood <manabian@gmail.com> Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Tobias Klauser <tklauser@distanz.ch> Cc: Russell King <linux@armlinux.org.uk> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Richard Genoud <richard.genoud@gmail.com> Cc: Alexander Shiyan <shc_work@mail.ru> Cc: Baruch Siach <baruch@tkos.co.il> Cc: "Maciej W. Rozycki" <macro@linux-mips.org> Cc: "Uwe Kleine-König" <kernel@pengutronix.de> Cc: Pat Gefre <pfg@sgi.com> Cc: "Guilherme G. Piccoli" <gpiccoli@linux.vnet.ibm.com> Cc: Jason Wessel <jason.wessel@windriver.com> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Sylvain Lemieux <slemieux.tyco@gmail.com> Cc: Carlo Caione <carlo@caione.org> Cc: Kevin Hilman <khilman@baylibre.com> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Andy Gross <andy.gross@linaro.org> Cc: David Brown <david.brown@linaro.org> Cc: "Andreas Färber" <afaerber@suse.de> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Laxman Dewangan <ldewangan@nvidia.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Jonathan Hunter <jonathanh@nvidia.com> Cc: Barry Song <baohua@kernel.org> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Peter Korsgaard <jacmet@sunsite.dk> Cc: Timur Tabi <timur@tabi.org> Cc: Tony Prisk <linux@prisktech.co.nz> Cc: Michal Simek <michal.simek@xilinx.com> Cc: "Sören Brinkmann" <soren.brinkmann@xilinx.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Kate Stewart <kstewart@linuxfoundation.org> Cc: Philippe Ombredanne <pombredanne@nexb.com> Cc: Jiri Slaby <jslaby@suse.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
948 lines
22 KiB
C
948 lines
22 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* dz.c: Serial port driver for DECstations equipped
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* with the DZ chipset.
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*
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* Copyright (C) 1998 Olivier A. D. Lebaillif
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*
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* Email: olivier.lebaillif@ifrsys.com
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*
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* Copyright (C) 2004, 2006, 2007 Maciej W. Rozycki
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*
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* [31-AUG-98] triemer
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* Changed IRQ to use Harald's dec internals interrupts.h
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* removed base_addr code - moving address assignment to setup.c
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* Changed name of dz_init to rs_init to be consistent with tc code
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* [13-NOV-98] triemer fixed code to receive characters
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* after patches by harald to irq code.
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* [09-JAN-99] triemer minor fix for schedule - due to removal of timeout
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* field from "current" - somewhere between 2.1.121 and 2.1.131
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Qua Jun 27 15:02:26 BRT 2001
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* [27-JUN-2001] Arnaldo Carvalho de Melo <acme@conectiva.com.br> - cleanups
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*
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* Parts (C) 1999 David Airlie, airlied@linux.ie
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* [07-SEP-99] Bugfixes
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*
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* [06-Jan-2002] Russell King <rmk@arm.linux.org.uk>
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* Converted to new serial core
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*/
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#undef DEBUG_DZ
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#if defined(CONFIG_SERIAL_DZ_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
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#define SUPPORT_SYSRQ
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#endif
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#include <linux/bitops.h>
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#include <linux/compiler.h>
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#include <linux/console.h>
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#include <linux/delay.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <linux/kernel.h>
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#include <linux/major.h>
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#include <linux/module.h>
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#include <linux/serial.h>
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#include <linux/serial_core.h>
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#include <linux/sysrq.h>
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#include <linux/tty.h>
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#include <linux/tty_flip.h>
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#include <linux/atomic.h>
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#include <asm/bootinfo.h>
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#include <asm/io.h>
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#include <asm/dec/interrupts.h>
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#include <asm/dec/kn01.h>
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#include <asm/dec/kn02.h>
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#include <asm/dec/machtype.h>
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#include <asm/dec/prom.h>
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#include <asm/dec/system.h>
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#include "dz.h"
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MODULE_DESCRIPTION("DECstation DZ serial driver");
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MODULE_LICENSE("GPL");
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static char dz_name[] __initdata = "DECstation DZ serial driver version ";
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static char dz_version[] __initdata = "1.04";
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struct dz_port {
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struct dz_mux *mux;
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struct uart_port port;
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unsigned int cflag;
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};
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struct dz_mux {
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struct dz_port dport[DZ_NB_PORT];
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atomic_t map_guard;
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atomic_t irq_guard;
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int initialised;
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};
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static struct dz_mux dz_mux;
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static inline struct dz_port *to_dport(struct uart_port *uport)
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{
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return container_of(uport, struct dz_port, port);
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}
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/*
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* ------------------------------------------------------------
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* dz_in () and dz_out ()
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*
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* These routines are used to access the registers of the DZ
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* chip, hiding relocation differences between implementation.
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* ------------------------------------------------------------
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*/
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static u16 dz_in(struct dz_port *dport, unsigned offset)
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{
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void __iomem *addr = dport->port.membase + offset;
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return readw(addr);
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}
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static void dz_out(struct dz_port *dport, unsigned offset, u16 value)
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{
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void __iomem *addr = dport->port.membase + offset;
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writew(value, addr);
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}
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/*
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* ------------------------------------------------------------
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* rs_stop () and rs_start ()
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*
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* These routines are called before setting or resetting
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* tty->stopped. They enable or disable transmitter interrupts,
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* as necessary.
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* ------------------------------------------------------------
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*/
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static void dz_stop_tx(struct uart_port *uport)
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{
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struct dz_port *dport = to_dport(uport);
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u16 tmp, mask = 1 << dport->port.line;
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tmp = dz_in(dport, DZ_TCR); /* read the TX flag */
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tmp &= ~mask; /* clear the TX flag */
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dz_out(dport, DZ_TCR, tmp);
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}
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static void dz_start_tx(struct uart_port *uport)
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{
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struct dz_port *dport = to_dport(uport);
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u16 tmp, mask = 1 << dport->port.line;
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tmp = dz_in(dport, DZ_TCR); /* read the TX flag */
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tmp |= mask; /* set the TX flag */
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dz_out(dport, DZ_TCR, tmp);
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}
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static void dz_stop_rx(struct uart_port *uport)
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{
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struct dz_port *dport = to_dport(uport);
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dport->cflag &= ~DZ_RXENAB;
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dz_out(dport, DZ_LPR, dport->cflag);
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}
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/*
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* ------------------------------------------------------------
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*
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* Here start the interrupt handling routines. All of the following
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* subroutines are declared as inline and are folded into
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* dz_interrupt. They were separated out for readability's sake.
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*
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* Note: dz_interrupt() is a "fast" interrupt, which means that it
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* runs with interrupts turned off. People who may want to modify
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* dz_interrupt() should try to keep the interrupt handler as fast as
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* possible. After you are done making modifications, it is not a bad
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* idea to do:
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*
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* make drivers/serial/dz.s
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*
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* and look at the resulting assemble code in dz.s.
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*
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* ------------------------------------------------------------
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*/
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/*
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* ------------------------------------------------------------
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* receive_char ()
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*
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* This routine deals with inputs from any lines.
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* ------------------------------------------------------------
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*/
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static inline void dz_receive_chars(struct dz_mux *mux)
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{
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struct uart_port *uport;
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struct dz_port *dport = &mux->dport[0];
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struct uart_icount *icount;
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int lines_rx[DZ_NB_PORT] = { [0 ... DZ_NB_PORT - 1] = 0 };
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unsigned char ch, flag;
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u16 status;
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int i;
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while ((status = dz_in(dport, DZ_RBUF)) & DZ_DVAL) {
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dport = &mux->dport[LINE(status)];
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uport = &dport->port;
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ch = UCHAR(status); /* grab the char */
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flag = TTY_NORMAL;
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icount = &uport->icount;
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icount->rx++;
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if (unlikely(status & (DZ_OERR | DZ_FERR | DZ_PERR))) {
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/*
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* There is no separate BREAK status bit, so treat
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* null characters with framing errors as BREAKs;
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* normally, otherwise. For this move the Framing
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* Error bit to a simulated BREAK bit.
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*/
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if (!ch) {
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status |= (status & DZ_FERR) >>
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(ffs(DZ_FERR) - ffs(DZ_BREAK));
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status &= ~DZ_FERR;
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}
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/* Handle SysRq/SAK & keep track of the statistics. */
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if (status & DZ_BREAK) {
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icount->brk++;
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if (uart_handle_break(uport))
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continue;
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} else if (status & DZ_FERR)
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icount->frame++;
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else if (status & DZ_PERR)
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icount->parity++;
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if (status & DZ_OERR)
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icount->overrun++;
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status &= uport->read_status_mask;
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if (status & DZ_BREAK)
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flag = TTY_BREAK;
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else if (status & DZ_FERR)
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flag = TTY_FRAME;
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else if (status & DZ_PERR)
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flag = TTY_PARITY;
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}
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if (uart_handle_sysrq_char(uport, ch))
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continue;
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uart_insert_char(uport, status, DZ_OERR, ch, flag);
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lines_rx[LINE(status)] = 1;
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}
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for (i = 0; i < DZ_NB_PORT; i++)
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if (lines_rx[i])
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tty_flip_buffer_push(&mux->dport[i].port.state->port);
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}
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/*
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* ------------------------------------------------------------
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* transmit_char ()
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*
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* This routine deals with outputs to any lines.
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* ------------------------------------------------------------
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*/
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static inline void dz_transmit_chars(struct dz_mux *mux)
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{
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struct dz_port *dport = &mux->dport[0];
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struct circ_buf *xmit;
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unsigned char tmp;
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u16 status;
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status = dz_in(dport, DZ_CSR);
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dport = &mux->dport[LINE(status)];
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xmit = &dport->port.state->xmit;
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if (dport->port.x_char) { /* XON/XOFF chars */
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dz_out(dport, DZ_TDR, dport->port.x_char);
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dport->port.icount.tx++;
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dport->port.x_char = 0;
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return;
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}
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/* If nothing to do or stopped or hardware stopped. */
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if (uart_circ_empty(xmit) || uart_tx_stopped(&dport->port)) {
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spin_lock(&dport->port.lock);
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dz_stop_tx(&dport->port);
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spin_unlock(&dport->port.lock);
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return;
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}
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/*
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* If something to do... (remember the dz has no output fifo,
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* so we go one char at a time) :-<
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*/
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tmp = xmit->buf[xmit->tail];
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xmit->tail = (xmit->tail + 1) & (DZ_XMIT_SIZE - 1);
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dz_out(dport, DZ_TDR, tmp);
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dport->port.icount.tx++;
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if (uart_circ_chars_pending(xmit) < DZ_WAKEUP_CHARS)
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uart_write_wakeup(&dport->port);
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/* Are we are done. */
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if (uart_circ_empty(xmit)) {
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spin_lock(&dport->port.lock);
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dz_stop_tx(&dport->port);
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spin_unlock(&dport->port.lock);
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}
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}
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/*
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* ------------------------------------------------------------
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* check_modem_status()
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*
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* DS 3100 & 5100: Only valid for the MODEM line, duh!
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* DS 5000/200: Valid for the MODEM and PRINTER line.
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* ------------------------------------------------------------
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*/
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static inline void check_modem_status(struct dz_port *dport)
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{
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/*
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* FIXME:
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* 1. No status change interrupt; use a timer.
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* 2. Handle the 3100/5000 as appropriate. --macro
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*/
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u16 status;
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/* If not the modem line just return. */
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if (dport->port.line != DZ_MODEM)
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return;
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status = dz_in(dport, DZ_MSR);
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/* it's easy, since DSR2 is the only bit in the register */
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if (status)
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dport->port.icount.dsr++;
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}
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/*
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* ------------------------------------------------------------
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* dz_interrupt ()
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*
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* this is the main interrupt routine for the DZ chip.
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* It deals with the multiple ports.
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* ------------------------------------------------------------
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*/
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static irqreturn_t dz_interrupt(int irq, void *dev_id)
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{
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struct dz_mux *mux = dev_id;
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struct dz_port *dport = &mux->dport[0];
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u16 status;
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/* get the reason why we just got an irq */
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status = dz_in(dport, DZ_CSR);
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if ((status & (DZ_RDONE | DZ_RIE)) == (DZ_RDONE | DZ_RIE))
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dz_receive_chars(mux);
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if ((status & (DZ_TRDY | DZ_TIE)) == (DZ_TRDY | DZ_TIE))
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dz_transmit_chars(mux);
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return IRQ_HANDLED;
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}
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/*
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* -------------------------------------------------------------------
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* Here ends the DZ interrupt routines.
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* -------------------------------------------------------------------
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*/
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static unsigned int dz_get_mctrl(struct uart_port *uport)
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{
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/*
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* FIXME: Handle the 3100/5000 as appropriate. --macro
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*/
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struct dz_port *dport = to_dport(uport);
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unsigned int mctrl = TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
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if (dport->port.line == DZ_MODEM) {
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if (dz_in(dport, DZ_MSR) & DZ_MODEM_DSR)
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mctrl &= ~TIOCM_DSR;
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}
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return mctrl;
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}
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static void dz_set_mctrl(struct uart_port *uport, unsigned int mctrl)
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{
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/*
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* FIXME: Handle the 3100/5000 as appropriate. --macro
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*/
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struct dz_port *dport = to_dport(uport);
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u16 tmp;
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if (dport->port.line == DZ_MODEM) {
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tmp = dz_in(dport, DZ_TCR);
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if (mctrl & TIOCM_DTR)
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tmp &= ~DZ_MODEM_DTR;
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else
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tmp |= DZ_MODEM_DTR;
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dz_out(dport, DZ_TCR, tmp);
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}
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}
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/*
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* -------------------------------------------------------------------
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* startup ()
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*
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* various initialization tasks
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* -------------------------------------------------------------------
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*/
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static int dz_startup(struct uart_port *uport)
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{
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struct dz_port *dport = to_dport(uport);
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struct dz_mux *mux = dport->mux;
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unsigned long flags;
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int irq_guard;
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int ret;
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u16 tmp;
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irq_guard = atomic_add_return(1, &mux->irq_guard);
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if (irq_guard != 1)
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return 0;
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ret = request_irq(dport->port.irq, dz_interrupt,
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IRQF_SHARED, "dz", mux);
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if (ret) {
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atomic_add(-1, &mux->irq_guard);
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printk(KERN_ERR "dz: Cannot get IRQ %d!\n", dport->port.irq);
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return ret;
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}
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spin_lock_irqsave(&dport->port.lock, flags);
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/* Enable interrupts. */
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tmp = dz_in(dport, DZ_CSR);
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tmp |= DZ_RIE | DZ_TIE;
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dz_out(dport, DZ_CSR, tmp);
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spin_unlock_irqrestore(&dport->port.lock, flags);
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return 0;
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}
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/*
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* -------------------------------------------------------------------
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* shutdown ()
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*
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* This routine will shutdown a serial port; interrupts are disabled, and
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* DTR is dropped if the hangup on close termio flag is on.
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* -------------------------------------------------------------------
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*/
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static void dz_shutdown(struct uart_port *uport)
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{
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struct dz_port *dport = to_dport(uport);
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struct dz_mux *mux = dport->mux;
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unsigned long flags;
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int irq_guard;
|
|
u16 tmp;
|
|
|
|
spin_lock_irqsave(&dport->port.lock, flags);
|
|
dz_stop_tx(&dport->port);
|
|
spin_unlock_irqrestore(&dport->port.lock, flags);
|
|
|
|
irq_guard = atomic_add_return(-1, &mux->irq_guard);
|
|
if (!irq_guard) {
|
|
/* Disable interrupts. */
|
|
tmp = dz_in(dport, DZ_CSR);
|
|
tmp &= ~(DZ_RIE | DZ_TIE);
|
|
dz_out(dport, DZ_CSR, tmp);
|
|
|
|
free_irq(dport->port.irq, mux);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* -------------------------------------------------------------------
|
|
* dz_tx_empty() -- get the transmitter empty status
|
|
*
|
|
* Purpose: Let user call ioctl() to get info when the UART physically
|
|
* is emptied. On bus types like RS485, the transmitter must
|
|
* release the bus after transmitting. This must be done when
|
|
* the transmit shift register is empty, not be done when the
|
|
* transmit holding register is empty. This functionality
|
|
* allows an RS485 driver to be written in user space.
|
|
* -------------------------------------------------------------------
|
|
*/
|
|
static unsigned int dz_tx_empty(struct uart_port *uport)
|
|
{
|
|
struct dz_port *dport = to_dport(uport);
|
|
unsigned short tmp, mask = 1 << dport->port.line;
|
|
|
|
tmp = dz_in(dport, DZ_TCR);
|
|
tmp &= mask;
|
|
|
|
return tmp ? 0 : TIOCSER_TEMT;
|
|
}
|
|
|
|
static void dz_break_ctl(struct uart_port *uport, int break_state)
|
|
{
|
|
/*
|
|
* FIXME: Can't access BREAK bits in TDR easily;
|
|
* reuse the code for polled TX. --macro
|
|
*/
|
|
struct dz_port *dport = to_dport(uport);
|
|
unsigned long flags;
|
|
unsigned short tmp, mask = 1 << dport->port.line;
|
|
|
|
spin_lock_irqsave(&uport->lock, flags);
|
|
tmp = dz_in(dport, DZ_TCR);
|
|
if (break_state)
|
|
tmp |= mask;
|
|
else
|
|
tmp &= ~mask;
|
|
dz_out(dport, DZ_TCR, tmp);
|
|
spin_unlock_irqrestore(&uport->lock, flags);
|
|
}
|
|
|
|
static int dz_encode_baud_rate(unsigned int baud)
|
|
{
|
|
switch (baud) {
|
|
case 50:
|
|
return DZ_B50;
|
|
case 75:
|
|
return DZ_B75;
|
|
case 110:
|
|
return DZ_B110;
|
|
case 134:
|
|
return DZ_B134;
|
|
case 150:
|
|
return DZ_B150;
|
|
case 300:
|
|
return DZ_B300;
|
|
case 600:
|
|
return DZ_B600;
|
|
case 1200:
|
|
return DZ_B1200;
|
|
case 1800:
|
|
return DZ_B1800;
|
|
case 2000:
|
|
return DZ_B2000;
|
|
case 2400:
|
|
return DZ_B2400;
|
|
case 3600:
|
|
return DZ_B3600;
|
|
case 4800:
|
|
return DZ_B4800;
|
|
case 7200:
|
|
return DZ_B7200;
|
|
case 9600:
|
|
return DZ_B9600;
|
|
default:
|
|
return -1;
|
|
}
|
|
}
|
|
|
|
|
|
static void dz_reset(struct dz_port *dport)
|
|
{
|
|
struct dz_mux *mux = dport->mux;
|
|
|
|
if (mux->initialised)
|
|
return;
|
|
|
|
dz_out(dport, DZ_CSR, DZ_CLR);
|
|
while (dz_in(dport, DZ_CSR) & DZ_CLR);
|
|
iob();
|
|
|
|
/* Enable scanning. */
|
|
dz_out(dport, DZ_CSR, DZ_MSE);
|
|
|
|
mux->initialised = 1;
|
|
}
|
|
|
|
static void dz_set_termios(struct uart_port *uport, struct ktermios *termios,
|
|
struct ktermios *old_termios)
|
|
{
|
|
struct dz_port *dport = to_dport(uport);
|
|
unsigned long flags;
|
|
unsigned int cflag, baud;
|
|
int bflag;
|
|
|
|
cflag = dport->port.line;
|
|
|
|
switch (termios->c_cflag & CSIZE) {
|
|
case CS5:
|
|
cflag |= DZ_CS5;
|
|
break;
|
|
case CS6:
|
|
cflag |= DZ_CS6;
|
|
break;
|
|
case CS7:
|
|
cflag |= DZ_CS7;
|
|
break;
|
|
case CS8:
|
|
default:
|
|
cflag |= DZ_CS8;
|
|
}
|
|
|
|
if (termios->c_cflag & CSTOPB)
|
|
cflag |= DZ_CSTOPB;
|
|
if (termios->c_cflag & PARENB)
|
|
cflag |= DZ_PARENB;
|
|
if (termios->c_cflag & PARODD)
|
|
cflag |= DZ_PARODD;
|
|
|
|
baud = uart_get_baud_rate(uport, termios, old_termios, 50, 9600);
|
|
bflag = dz_encode_baud_rate(baud);
|
|
if (bflag < 0) { /* Try to keep unchanged. */
|
|
baud = uart_get_baud_rate(uport, old_termios, NULL, 50, 9600);
|
|
bflag = dz_encode_baud_rate(baud);
|
|
if (bflag < 0) { /* Resort to 9600. */
|
|
baud = 9600;
|
|
bflag = DZ_B9600;
|
|
}
|
|
tty_termios_encode_baud_rate(termios, baud, baud);
|
|
}
|
|
cflag |= bflag;
|
|
|
|
if (termios->c_cflag & CREAD)
|
|
cflag |= DZ_RXENAB;
|
|
|
|
spin_lock_irqsave(&dport->port.lock, flags);
|
|
|
|
uart_update_timeout(uport, termios->c_cflag, baud);
|
|
|
|
dz_out(dport, DZ_LPR, cflag);
|
|
dport->cflag = cflag;
|
|
|
|
/* setup accept flag */
|
|
dport->port.read_status_mask = DZ_OERR;
|
|
if (termios->c_iflag & INPCK)
|
|
dport->port.read_status_mask |= DZ_FERR | DZ_PERR;
|
|
if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
|
|
dport->port.read_status_mask |= DZ_BREAK;
|
|
|
|
/* characters to ignore */
|
|
uport->ignore_status_mask = 0;
|
|
if ((termios->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK))
|
|
dport->port.ignore_status_mask |= DZ_OERR;
|
|
if (termios->c_iflag & IGNPAR)
|
|
dport->port.ignore_status_mask |= DZ_FERR | DZ_PERR;
|
|
if (termios->c_iflag & IGNBRK)
|
|
dport->port.ignore_status_mask |= DZ_BREAK;
|
|
|
|
spin_unlock_irqrestore(&dport->port.lock, flags);
|
|
}
|
|
|
|
/*
|
|
* Hack alert!
|
|
* Required solely so that the initial PROM-based console
|
|
* works undisturbed in parallel with this one.
|
|
*/
|
|
static void dz_pm(struct uart_port *uport, unsigned int state,
|
|
unsigned int oldstate)
|
|
{
|
|
struct dz_port *dport = to_dport(uport);
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&dport->port.lock, flags);
|
|
if (state < 3)
|
|
dz_start_tx(&dport->port);
|
|
else
|
|
dz_stop_tx(&dport->port);
|
|
spin_unlock_irqrestore(&dport->port.lock, flags);
|
|
}
|
|
|
|
|
|
static const char *dz_type(struct uart_port *uport)
|
|
{
|
|
return "DZ";
|
|
}
|
|
|
|
static void dz_release_port(struct uart_port *uport)
|
|
{
|
|
struct dz_mux *mux = to_dport(uport)->mux;
|
|
int map_guard;
|
|
|
|
iounmap(uport->membase);
|
|
uport->membase = NULL;
|
|
|
|
map_guard = atomic_add_return(-1, &mux->map_guard);
|
|
if (!map_guard)
|
|
release_mem_region(uport->mapbase, dec_kn_slot_size);
|
|
}
|
|
|
|
static int dz_map_port(struct uart_port *uport)
|
|
{
|
|
if (!uport->membase)
|
|
uport->membase = ioremap_nocache(uport->mapbase,
|
|
dec_kn_slot_size);
|
|
if (!uport->membase) {
|
|
printk(KERN_ERR "dz: Cannot map MMIO\n");
|
|
return -ENOMEM;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static int dz_request_port(struct uart_port *uport)
|
|
{
|
|
struct dz_mux *mux = to_dport(uport)->mux;
|
|
int map_guard;
|
|
int ret;
|
|
|
|
map_guard = atomic_add_return(1, &mux->map_guard);
|
|
if (map_guard == 1) {
|
|
if (!request_mem_region(uport->mapbase, dec_kn_slot_size,
|
|
"dz")) {
|
|
atomic_add(-1, &mux->map_guard);
|
|
printk(KERN_ERR
|
|
"dz: Unable to reserve MMIO resource\n");
|
|
return -EBUSY;
|
|
}
|
|
}
|
|
ret = dz_map_port(uport);
|
|
if (ret) {
|
|
map_guard = atomic_add_return(-1, &mux->map_guard);
|
|
if (!map_guard)
|
|
release_mem_region(uport->mapbase, dec_kn_slot_size);
|
|
return ret;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static void dz_config_port(struct uart_port *uport, int flags)
|
|
{
|
|
struct dz_port *dport = to_dport(uport);
|
|
|
|
if (flags & UART_CONFIG_TYPE) {
|
|
if (dz_request_port(uport))
|
|
return;
|
|
|
|
uport->type = PORT_DZ;
|
|
|
|
dz_reset(dport);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Verify the new serial_struct (for TIOCSSERIAL).
|
|
*/
|
|
static int dz_verify_port(struct uart_port *uport, struct serial_struct *ser)
|
|
{
|
|
int ret = 0;
|
|
|
|
if (ser->type != PORT_UNKNOWN && ser->type != PORT_DZ)
|
|
ret = -EINVAL;
|
|
if (ser->irq != uport->irq)
|
|
ret = -EINVAL;
|
|
return ret;
|
|
}
|
|
|
|
static const struct uart_ops dz_ops = {
|
|
.tx_empty = dz_tx_empty,
|
|
.get_mctrl = dz_get_mctrl,
|
|
.set_mctrl = dz_set_mctrl,
|
|
.stop_tx = dz_stop_tx,
|
|
.start_tx = dz_start_tx,
|
|
.stop_rx = dz_stop_rx,
|
|
.break_ctl = dz_break_ctl,
|
|
.startup = dz_startup,
|
|
.shutdown = dz_shutdown,
|
|
.set_termios = dz_set_termios,
|
|
.pm = dz_pm,
|
|
.type = dz_type,
|
|
.release_port = dz_release_port,
|
|
.request_port = dz_request_port,
|
|
.config_port = dz_config_port,
|
|
.verify_port = dz_verify_port,
|
|
};
|
|
|
|
static void __init dz_init_ports(void)
|
|
{
|
|
static int first = 1;
|
|
unsigned long base;
|
|
int line;
|
|
|
|
if (!first)
|
|
return;
|
|
first = 0;
|
|
|
|
if (mips_machtype == MACH_DS23100 || mips_machtype == MACH_DS5100)
|
|
base = dec_kn_slot_base + KN01_DZ11;
|
|
else
|
|
base = dec_kn_slot_base + KN02_DZ11;
|
|
|
|
for (line = 0; line < DZ_NB_PORT; line++) {
|
|
struct dz_port *dport = &dz_mux.dport[line];
|
|
struct uart_port *uport = &dport->port;
|
|
|
|
dport->mux = &dz_mux;
|
|
|
|
uport->irq = dec_interrupt[DEC_IRQ_DZ11];
|
|
uport->fifosize = 1;
|
|
uport->iotype = UPIO_MEM;
|
|
uport->flags = UPF_BOOT_AUTOCONF;
|
|
uport->ops = &dz_ops;
|
|
uport->line = line;
|
|
uport->mapbase = base;
|
|
}
|
|
}
|
|
|
|
#ifdef CONFIG_SERIAL_DZ_CONSOLE
|
|
/*
|
|
* -------------------------------------------------------------------
|
|
* dz_console_putchar() -- transmit a character
|
|
*
|
|
* Polled transmission. This is tricky. We need to mask transmit
|
|
* interrupts so that they do not interfere, enable the transmitter
|
|
* for the line requested and then wait till the transmit scanner
|
|
* requests data for this line. But it may request data for another
|
|
* line first, in which case we have to disable its transmitter and
|
|
* repeat waiting till our line pops up. Only then the character may
|
|
* be transmitted. Finally, the state of the transmitter mask is
|
|
* restored. Welcome to the world of PDP-11!
|
|
* -------------------------------------------------------------------
|
|
*/
|
|
static void dz_console_putchar(struct uart_port *uport, int ch)
|
|
{
|
|
struct dz_port *dport = to_dport(uport);
|
|
unsigned long flags;
|
|
unsigned short csr, tcr, trdy, mask;
|
|
int loops = 10000;
|
|
|
|
spin_lock_irqsave(&dport->port.lock, flags);
|
|
csr = dz_in(dport, DZ_CSR);
|
|
dz_out(dport, DZ_CSR, csr & ~DZ_TIE);
|
|
tcr = dz_in(dport, DZ_TCR);
|
|
tcr |= 1 << dport->port.line;
|
|
mask = tcr;
|
|
dz_out(dport, DZ_TCR, mask);
|
|
iob();
|
|
spin_unlock_irqrestore(&dport->port.lock, flags);
|
|
|
|
do {
|
|
trdy = dz_in(dport, DZ_CSR);
|
|
if (!(trdy & DZ_TRDY))
|
|
continue;
|
|
trdy = (trdy & DZ_TLINE) >> 8;
|
|
if (trdy == dport->port.line)
|
|
break;
|
|
mask &= ~(1 << trdy);
|
|
dz_out(dport, DZ_TCR, mask);
|
|
iob();
|
|
udelay(2);
|
|
} while (--loops);
|
|
|
|
if (loops) /* Cannot send otherwise. */
|
|
dz_out(dport, DZ_TDR, ch);
|
|
|
|
dz_out(dport, DZ_TCR, tcr);
|
|
dz_out(dport, DZ_CSR, csr);
|
|
}
|
|
|
|
/*
|
|
* -------------------------------------------------------------------
|
|
* dz_console_print ()
|
|
*
|
|
* dz_console_print is registered for printk.
|
|
* The console must be locked when we get here.
|
|
* -------------------------------------------------------------------
|
|
*/
|
|
static void dz_console_print(struct console *co,
|
|
const char *str,
|
|
unsigned int count)
|
|
{
|
|
struct dz_port *dport = &dz_mux.dport[co->index];
|
|
#ifdef DEBUG_DZ
|
|
prom_printf((char *) str);
|
|
#endif
|
|
uart_console_write(&dport->port, str, count, dz_console_putchar);
|
|
}
|
|
|
|
static int __init dz_console_setup(struct console *co, char *options)
|
|
{
|
|
struct dz_port *dport = &dz_mux.dport[co->index];
|
|
struct uart_port *uport = &dport->port;
|
|
int baud = 9600;
|
|
int bits = 8;
|
|
int parity = 'n';
|
|
int flow = 'n';
|
|
int ret;
|
|
|
|
ret = dz_map_port(uport);
|
|
if (ret)
|
|
return ret;
|
|
|
|
spin_lock_init(&dport->port.lock); /* For dz_pm(). */
|
|
|
|
dz_reset(dport);
|
|
dz_pm(uport, 0, -1);
|
|
|
|
if (options)
|
|
uart_parse_options(options, &baud, &parity, &bits, &flow);
|
|
|
|
return uart_set_options(&dport->port, co, baud, parity, bits, flow);
|
|
}
|
|
|
|
static struct uart_driver dz_reg;
|
|
static struct console dz_console = {
|
|
.name = "ttyS",
|
|
.write = dz_console_print,
|
|
.device = uart_console_device,
|
|
.setup = dz_console_setup,
|
|
.flags = CON_PRINTBUFFER,
|
|
.index = -1,
|
|
.data = &dz_reg,
|
|
};
|
|
|
|
static int __init dz_serial_console_init(void)
|
|
{
|
|
if (!IOASIC) {
|
|
dz_init_ports();
|
|
register_console(&dz_console);
|
|
return 0;
|
|
} else
|
|
return -ENXIO;
|
|
}
|
|
|
|
console_initcall(dz_serial_console_init);
|
|
|
|
#define SERIAL_DZ_CONSOLE &dz_console
|
|
#else
|
|
#define SERIAL_DZ_CONSOLE NULL
|
|
#endif /* CONFIG_SERIAL_DZ_CONSOLE */
|
|
|
|
static struct uart_driver dz_reg = {
|
|
.owner = THIS_MODULE,
|
|
.driver_name = "serial",
|
|
.dev_name = "ttyS",
|
|
.major = TTY_MAJOR,
|
|
.minor = 64,
|
|
.nr = DZ_NB_PORT,
|
|
.cons = SERIAL_DZ_CONSOLE,
|
|
};
|
|
|
|
static int __init dz_init(void)
|
|
{
|
|
int ret, i;
|
|
|
|
if (IOASIC)
|
|
return -ENXIO;
|
|
|
|
printk("%s%s\n", dz_name, dz_version);
|
|
|
|
dz_init_ports();
|
|
|
|
ret = uart_register_driver(&dz_reg);
|
|
if (ret)
|
|
return ret;
|
|
|
|
for (i = 0; i < DZ_NB_PORT; i++)
|
|
uart_add_one_port(&dz_reg, &dz_mux.dport[i].port);
|
|
|
|
return 0;
|
|
}
|
|
|
|
module_init(dz_init);
|