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![Manivannan Sadhasivam](/assets/img/avatar_default.png)
Add UART driver for RDA Micro RDA8810PL SoC. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Olof Johansson <olof@lixom.net>
831 lines
20 KiB
C
831 lines
20 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* RDA8810PL serial device driver
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*
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* Copyright RDA Microelectronics Company Limited
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* Copyright (c) 2017 Andreas Färber
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* Copyright (c) 2018 Manivannan Sadhasivam
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*/
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#include <linux/clk.h>
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#include <linux/console.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/serial.h>
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#include <linux/serial_core.h>
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#include <linux/tty.h>
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#include <linux/tty_flip.h>
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#define RDA_UART_PORT_NUM 3
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#define RDA_UART_DEV_NAME "ttyRDA"
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#define RDA_UART_CTRL 0x00
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#define RDA_UART_STATUS 0x04
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#define RDA_UART_RXTX_BUFFER 0x08
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#define RDA_UART_IRQ_MASK 0x0c
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#define RDA_UART_IRQ_CAUSE 0x10
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#define RDA_UART_IRQ_TRIGGERS 0x14
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#define RDA_UART_CMD_SET 0x18
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#define RDA_UART_CMD_CLR 0x1c
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/* UART_CTRL Bits */
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#define RDA_UART_ENABLE BIT(0)
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#define RDA_UART_DBITS_8 BIT(1)
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#define RDA_UART_TX_SBITS_2 BIT(2)
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#define RDA_UART_PARITY_EN BIT(3)
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#define RDA_UART_PARITY(x) (((x) & 0x3) << 4)
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#define RDA_UART_PARITY_ODD RDA_UART_PARITY(0)
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#define RDA_UART_PARITY_EVEN RDA_UART_PARITY(1)
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#define RDA_UART_PARITY_SPACE RDA_UART_PARITY(2)
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#define RDA_UART_PARITY_MARK RDA_UART_PARITY(3)
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#define RDA_UART_DIV_MODE BIT(20)
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#define RDA_UART_IRDA_EN BIT(21)
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#define RDA_UART_DMA_EN BIT(22)
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#define RDA_UART_FLOW_CNT_EN BIT(23)
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#define RDA_UART_LOOP_BACK_EN BIT(24)
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#define RDA_UART_RX_LOCK_ERR BIT(25)
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#define RDA_UART_RX_BREAK_LEN(x) (((x) & 0xf) << 28)
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/* UART_STATUS Bits */
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#define RDA_UART_RX_FIFO(x) (((x) & 0x7f) << 0)
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#define RDA_UART_RX_FIFO_MASK (0x7f << 0)
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#define RDA_UART_TX_FIFO(x) (((x) & 0x1f) << 8)
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#define RDA_UART_TX_FIFO_MASK (0x1f << 8)
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#define RDA_UART_TX_ACTIVE BIT(14)
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#define RDA_UART_RX_ACTIVE BIT(15)
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#define RDA_UART_RX_OVERFLOW_ERR BIT(16)
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#define RDA_UART_TX_OVERFLOW_ERR BIT(17)
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#define RDA_UART_RX_PARITY_ERR BIT(18)
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#define RDA_UART_RX_FRAMING_ERR BIT(19)
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#define RDA_UART_RX_BREAK_INT BIT(20)
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#define RDA_UART_DCTS BIT(24)
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#define RDA_UART_CTS BIT(25)
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#define RDA_UART_DTR BIT(28)
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#define RDA_UART_CLK_ENABLED BIT(31)
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/* UART_RXTX_BUFFER Bits */
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#define RDA_UART_RX_DATA(x) (((x) & 0xff) << 0)
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#define RDA_UART_TX_DATA(x) (((x) & 0xff) << 0)
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/* UART_IRQ_MASK Bits */
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#define RDA_UART_TX_MODEM_STATUS BIT(0)
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#define RDA_UART_RX_DATA_AVAILABLE BIT(1)
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#define RDA_UART_TX_DATA_NEEDED BIT(2)
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#define RDA_UART_RX_TIMEOUT BIT(3)
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#define RDA_UART_RX_LINE_ERR BIT(4)
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#define RDA_UART_TX_DMA_DONE BIT(5)
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#define RDA_UART_RX_DMA_DONE BIT(6)
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#define RDA_UART_RX_DMA_TIMEOUT BIT(7)
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#define RDA_UART_DTR_RISE BIT(8)
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#define RDA_UART_DTR_FALL BIT(9)
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/* UART_IRQ_CAUSE Bits */
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#define RDA_UART_TX_MODEM_STATUS_U BIT(16)
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#define RDA_UART_RX_DATA_AVAILABLE_U BIT(17)
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#define RDA_UART_TX_DATA_NEEDED_U BIT(18)
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#define RDA_UART_RX_TIMEOUT_U BIT(19)
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#define RDA_UART_RX_LINE_ERR_U BIT(20)
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#define RDA_UART_TX_DMA_DONE_U BIT(21)
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#define RDA_UART_RX_DMA_DONE_U BIT(22)
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#define RDA_UART_RX_DMA_TIMEOUT_U BIT(23)
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#define RDA_UART_DTR_RISE_U BIT(24)
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#define RDA_UART_DTR_FALL_U BIT(25)
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/* UART_TRIGGERS Bits */
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#define RDA_UART_RX_TRIGGER(x) (((x) & 0x1f) << 0)
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#define RDA_UART_TX_TRIGGER(x) (((x) & 0xf) << 8)
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#define RDA_UART_AFC_LEVEL(x) (((x) & 0x1f) << 16)
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/* UART_CMD_SET Bits */
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#define RDA_UART_RI BIT(0)
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#define RDA_UART_DCD BIT(1)
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#define RDA_UART_DSR BIT(2)
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#define RDA_UART_TX_BREAK_CONTROL BIT(3)
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#define RDA_UART_TX_FINISH_N_WAIT BIT(4)
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#define RDA_UART_RTS BIT(5)
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#define RDA_UART_RX_FIFO_RESET BIT(6)
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#define RDA_UART_TX_FIFO_RESET BIT(7)
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#define RDA_UART_TX_FIFO_SIZE 16
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static struct uart_driver rda_uart_driver;
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struct rda_uart_port {
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struct uart_port port;
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struct clk *clk;
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};
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#define to_rda_uart_port(port) container_of(port, struct rda_uart_port, port)
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static struct rda_uart_port *rda_uart_ports[RDA_UART_PORT_NUM];
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static inline void rda_uart_write(struct uart_port *port, u32 val,
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unsigned int off)
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{
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writel(val, port->membase + off);
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}
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static inline u32 rda_uart_read(struct uart_port *port, unsigned int off)
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{
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return readl(port->membase + off);
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}
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static unsigned int rda_uart_tx_empty(struct uart_port *port)
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{
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unsigned long flags;
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unsigned int ret;
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u32 val;
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spin_lock_irqsave(&port->lock, flags);
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val = rda_uart_read(port, RDA_UART_STATUS);
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ret = (val & RDA_UART_TX_FIFO_MASK) ? TIOCSER_TEMT : 0;
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spin_unlock_irqrestore(&port->lock, flags);
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return ret;
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}
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static unsigned int rda_uart_get_mctrl(struct uart_port *port)
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{
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unsigned int mctrl = 0;
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u32 cmd_set, status;
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cmd_set = rda_uart_read(port, RDA_UART_CMD_SET);
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status = rda_uart_read(port, RDA_UART_STATUS);
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if (cmd_set & RDA_UART_RTS)
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mctrl |= TIOCM_RTS;
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if (!(status & RDA_UART_CTS))
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mctrl |= TIOCM_CTS;
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return mctrl;
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}
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static void rda_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
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{
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u32 val;
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if (mctrl & TIOCM_RTS) {
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val = rda_uart_read(port, RDA_UART_CMD_SET);
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rda_uart_write(port, (val | RDA_UART_RTS), RDA_UART_CMD_SET);
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} else {
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/* Clear RTS to stop to receive. */
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val = rda_uart_read(port, RDA_UART_CMD_CLR);
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rda_uart_write(port, (val | RDA_UART_RTS), RDA_UART_CMD_CLR);
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}
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val = rda_uart_read(port, RDA_UART_CTRL);
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if (mctrl & TIOCM_LOOP)
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val |= RDA_UART_LOOP_BACK_EN;
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else
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val &= ~RDA_UART_LOOP_BACK_EN;
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rda_uart_write(port, val, RDA_UART_CTRL);
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}
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static void rda_uart_stop_tx(struct uart_port *port)
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{
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u32 val;
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val = rda_uart_read(port, RDA_UART_IRQ_MASK);
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val &= ~RDA_UART_TX_DATA_NEEDED;
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rda_uart_write(port, val, RDA_UART_IRQ_MASK);
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val = rda_uart_read(port, RDA_UART_CMD_SET);
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val |= RDA_UART_TX_FIFO_RESET;
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rda_uart_write(port, val, RDA_UART_CMD_SET);
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}
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static void rda_uart_stop_rx(struct uart_port *port)
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{
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u32 val;
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val = rda_uart_read(port, RDA_UART_IRQ_MASK);
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val &= ~(RDA_UART_RX_DATA_AVAILABLE | RDA_UART_RX_TIMEOUT);
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rda_uart_write(port, val, RDA_UART_IRQ_MASK);
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/* Read Rx buffer before reset to avoid Rx timeout interrupt */
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val = rda_uart_read(port, RDA_UART_RXTX_BUFFER);
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val = rda_uart_read(port, RDA_UART_CMD_SET);
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val |= RDA_UART_RX_FIFO_RESET;
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rda_uart_write(port, val, RDA_UART_CMD_SET);
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}
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static void rda_uart_start_tx(struct uart_port *port)
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{
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u32 val;
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if (uart_tx_stopped(port)) {
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rda_uart_stop_tx(port);
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return;
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}
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val = rda_uart_read(port, RDA_UART_IRQ_MASK);
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val |= RDA_UART_TX_DATA_NEEDED;
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rda_uart_write(port, val, RDA_UART_IRQ_MASK);
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}
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static void rda_uart_change_baudrate(struct rda_uart_port *rda_port,
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unsigned long baud)
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{
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clk_set_rate(rda_port->clk, baud * 8);
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}
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static void rda_uart_set_termios(struct uart_port *port,
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struct ktermios *termios,
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struct ktermios *old)
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{
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struct rda_uart_port *rda_port = to_rda_uart_port(port);
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unsigned long flags;
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unsigned int ctrl, cmd_set, cmd_clr, triggers;
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unsigned int baud;
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u32 irq_mask;
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spin_lock_irqsave(&port->lock, flags);
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baud = uart_get_baud_rate(port, termios, old, 9600, port->uartclk / 4);
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rda_uart_change_baudrate(rda_port, baud);
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ctrl = rda_uart_read(port, RDA_UART_CTRL);
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cmd_set = rda_uart_read(port, RDA_UART_CMD_SET);
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cmd_clr = rda_uart_read(port, RDA_UART_CMD_CLR);
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switch (termios->c_cflag & CSIZE) {
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case CS5:
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case CS6:
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dev_warn(port->dev, "bit size not supported, using 7 bits\n");
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/* Fall through */
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case CS7:
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ctrl &= ~RDA_UART_DBITS_8;
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break;
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default:
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ctrl |= RDA_UART_DBITS_8;
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break;
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}
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/* stop bits */
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if (termios->c_cflag & CSTOPB)
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ctrl |= RDA_UART_TX_SBITS_2;
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else
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ctrl &= ~RDA_UART_TX_SBITS_2;
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/* parity check */
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if (termios->c_cflag & PARENB) {
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ctrl |= RDA_UART_PARITY_EN;
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/* Mark or Space parity */
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if (termios->c_cflag & CMSPAR) {
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if (termios->c_cflag & PARODD)
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ctrl |= RDA_UART_PARITY_MARK;
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else
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ctrl |= RDA_UART_PARITY_SPACE;
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} else if (termios->c_cflag & PARODD) {
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ctrl |= RDA_UART_PARITY_ODD;
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} else {
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ctrl |= RDA_UART_PARITY_EVEN;
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}
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} else {
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ctrl &= ~RDA_UART_PARITY_EN;
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}
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/* Hardware handshake (RTS/CTS) */
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if (termios->c_cflag & CRTSCTS) {
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ctrl |= RDA_UART_FLOW_CNT_EN;
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cmd_set |= RDA_UART_RTS;
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} else {
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ctrl &= ~RDA_UART_FLOW_CNT_EN;
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cmd_clr |= RDA_UART_RTS;
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}
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ctrl |= RDA_UART_ENABLE;
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ctrl &= ~RDA_UART_DMA_EN;
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triggers = (RDA_UART_AFC_LEVEL(20) | RDA_UART_RX_TRIGGER(16));
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irq_mask = rda_uart_read(port, RDA_UART_IRQ_MASK);
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rda_uart_write(port, 0, RDA_UART_IRQ_MASK);
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rda_uart_write(port, triggers, RDA_UART_IRQ_TRIGGERS);
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rda_uart_write(port, ctrl, RDA_UART_CTRL);
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rda_uart_write(port, cmd_set, RDA_UART_CMD_SET);
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rda_uart_write(port, cmd_clr, RDA_UART_CMD_CLR);
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rda_uart_write(port, irq_mask, RDA_UART_IRQ_MASK);
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/* Don't rewrite B0 */
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if (tty_termios_baud_rate(termios))
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tty_termios_encode_baud_rate(termios, baud, baud);
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/* update the per-port timeout */
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uart_update_timeout(port, termios->c_cflag, baud);
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static void rda_uart_send_chars(struct uart_port *port)
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{
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struct circ_buf *xmit = &port->state->xmit;
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unsigned int ch;
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u32 val;
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if (uart_tx_stopped(port))
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return;
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if (port->x_char) {
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while (!(rda_uart_read(port, RDA_UART_STATUS) &
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RDA_UART_TX_FIFO_MASK))
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cpu_relax();
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rda_uart_write(port, port->x_char, RDA_UART_RXTX_BUFFER);
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port->icount.tx++;
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port->x_char = 0;
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}
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while (rda_uart_read(port, RDA_UART_STATUS) & RDA_UART_TX_FIFO_MASK) {
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if (uart_circ_empty(xmit))
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break;
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ch = xmit->buf[xmit->tail];
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rda_uart_write(port, ch, RDA_UART_RXTX_BUFFER);
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xmit->tail = (xmit->tail + 1) & (SERIAL_XMIT_SIZE - 1);
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port->icount.tx++;
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}
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(port);
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if (!uart_circ_empty(xmit)) {
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/* Re-enable Tx FIFO interrupt */
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val = rda_uart_read(port, RDA_UART_IRQ_MASK);
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val |= RDA_UART_TX_DATA_NEEDED;
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rda_uart_write(port, val, RDA_UART_IRQ_MASK);
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}
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}
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static void rda_uart_receive_chars(struct uart_port *port)
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{
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u32 status, val;
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status = rda_uart_read(port, RDA_UART_STATUS);
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while ((status & RDA_UART_RX_FIFO_MASK)) {
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char flag = TTY_NORMAL;
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if (status & RDA_UART_RX_PARITY_ERR) {
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port->icount.parity++;
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flag = TTY_PARITY;
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}
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if (status & RDA_UART_RX_FRAMING_ERR) {
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port->icount.frame++;
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flag = TTY_FRAME;
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}
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if (status & RDA_UART_RX_OVERFLOW_ERR) {
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port->icount.overrun++;
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flag = TTY_OVERRUN;
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}
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val = rda_uart_read(port, RDA_UART_RXTX_BUFFER);
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val &= 0xff;
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port->icount.rx++;
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tty_insert_flip_char(&port->state->port, val, flag);
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status = rda_uart_read(port, RDA_UART_STATUS);
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}
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spin_unlock(&port->lock);
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tty_flip_buffer_push(&port->state->port);
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spin_lock(&port->lock);
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}
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static irqreturn_t rda_interrupt(int irq, void *dev_id)
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{
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struct uart_port *port = dev_id;
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unsigned long flags;
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u32 val, irq_mask;
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spin_lock_irqsave(&port->lock, flags);
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/* Clear IRQ cause */
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val = rda_uart_read(port, RDA_UART_IRQ_CAUSE);
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rda_uart_write(port, val, RDA_UART_IRQ_CAUSE);
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if (val & (RDA_UART_RX_DATA_AVAILABLE | RDA_UART_RX_TIMEOUT))
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rda_uart_receive_chars(port);
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if (val & (RDA_UART_TX_DATA_NEEDED)) {
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irq_mask = rda_uart_read(port, RDA_UART_IRQ_MASK);
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irq_mask &= ~RDA_UART_TX_DATA_NEEDED;
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rda_uart_write(port, irq_mask, RDA_UART_IRQ_MASK);
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rda_uart_send_chars(port);
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}
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spin_unlock_irqrestore(&port->lock, flags);
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return IRQ_HANDLED;
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}
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static int rda_uart_startup(struct uart_port *port)
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{
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unsigned long flags;
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int ret;
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u32 val;
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spin_lock_irqsave(&port->lock, flags);
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rda_uart_write(port, 0, RDA_UART_IRQ_MASK);
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spin_unlock_irqrestore(&port->lock, flags);
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ret = request_irq(port->irq, rda_interrupt, IRQF_NO_SUSPEND,
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"rda-uart", port);
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if (ret)
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return ret;
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|
spin_lock_irqsave(&port->lock, flags);
|
|
|
|
val = rda_uart_read(port, RDA_UART_CTRL);
|
|
val |= RDA_UART_ENABLE;
|
|
rda_uart_write(port, val, RDA_UART_CTRL);
|
|
|
|
/* enable rx interrupt */
|
|
val = rda_uart_read(port, RDA_UART_IRQ_MASK);
|
|
val |= (RDA_UART_RX_DATA_AVAILABLE | RDA_UART_RX_TIMEOUT);
|
|
rda_uart_write(port, val, RDA_UART_IRQ_MASK);
|
|
|
|
spin_unlock_irqrestore(&port->lock, flags);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void rda_uart_shutdown(struct uart_port *port)
|
|
{
|
|
unsigned long flags;
|
|
u32 val;
|
|
|
|
spin_lock_irqsave(&port->lock, flags);
|
|
|
|
rda_uart_stop_tx(port);
|
|
rda_uart_stop_rx(port);
|
|
|
|
val = rda_uart_read(port, RDA_UART_CTRL);
|
|
val &= ~RDA_UART_ENABLE;
|
|
rda_uart_write(port, val, RDA_UART_CTRL);
|
|
|
|
spin_unlock_irqrestore(&port->lock, flags);
|
|
}
|
|
|
|
static const char *rda_uart_type(struct uart_port *port)
|
|
{
|
|
return (port->type == PORT_RDA) ? "rda-uart" : NULL;
|
|
}
|
|
|
|
static int rda_uart_request_port(struct uart_port *port)
|
|
{
|
|
struct platform_device *pdev = to_platform_device(port->dev);
|
|
struct resource *res;
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
if (!res)
|
|
return -ENXIO;
|
|
|
|
if (!devm_request_mem_region(port->dev, port->mapbase,
|
|
resource_size(res), dev_name(port->dev)))
|
|
return -EBUSY;
|
|
|
|
if (port->flags & UPF_IOREMAP) {
|
|
port->membase = devm_ioremap_nocache(port->dev, port->mapbase,
|
|
resource_size(res));
|
|
if (!port->membase)
|
|
return -EBUSY;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void rda_uart_config_port(struct uart_port *port, int flags)
|
|
{
|
|
unsigned long irq_flags;
|
|
|
|
if (flags & UART_CONFIG_TYPE) {
|
|
port->type = PORT_RDA;
|
|
rda_uart_request_port(port);
|
|
}
|
|
|
|
spin_lock_irqsave(&port->lock, irq_flags);
|
|
|
|
/* Clear mask, so no surprise interrupts. */
|
|
rda_uart_write(port, 0, RDA_UART_IRQ_MASK);
|
|
|
|
/* Clear status register */
|
|
rda_uart_write(port, 0, RDA_UART_STATUS);
|
|
|
|
spin_unlock_irqrestore(&port->lock, irq_flags);
|
|
}
|
|
|
|
static void rda_uart_release_port(struct uart_port *port)
|
|
{
|
|
struct platform_device *pdev = to_platform_device(port->dev);
|
|
struct resource *res;
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
if (!res)
|
|
return;
|
|
|
|
if (port->flags & UPF_IOREMAP) {
|
|
devm_release_mem_region(port->dev, port->mapbase,
|
|
resource_size(res));
|
|
devm_iounmap(port->dev, port->membase);
|
|
port->membase = NULL;
|
|
}
|
|
}
|
|
|
|
static int rda_uart_verify_port(struct uart_port *port,
|
|
struct serial_struct *ser)
|
|
{
|
|
if (port->type != PORT_RDA)
|
|
return -EINVAL;
|
|
|
|
if (port->irq != ser->irq)
|
|
return -EINVAL;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct uart_ops rda_uart_ops = {
|
|
.tx_empty = rda_uart_tx_empty,
|
|
.get_mctrl = rda_uart_get_mctrl,
|
|
.set_mctrl = rda_uart_set_mctrl,
|
|
.start_tx = rda_uart_start_tx,
|
|
.stop_tx = rda_uart_stop_tx,
|
|
.stop_rx = rda_uart_stop_rx,
|
|
.startup = rda_uart_startup,
|
|
.shutdown = rda_uart_shutdown,
|
|
.set_termios = rda_uart_set_termios,
|
|
.type = rda_uart_type,
|
|
.request_port = rda_uart_request_port,
|
|
.release_port = rda_uart_release_port,
|
|
.config_port = rda_uart_config_port,
|
|
.verify_port = rda_uart_verify_port,
|
|
};
|
|
|
|
#ifdef CONFIG_SERIAL_RDA_CONSOLE
|
|
|
|
static void rda_console_putchar(struct uart_port *port, int ch)
|
|
{
|
|
if (!port->membase)
|
|
return;
|
|
|
|
while (!(rda_uart_read(port, RDA_UART_STATUS) & RDA_UART_TX_FIFO_MASK))
|
|
cpu_relax();
|
|
|
|
rda_uart_write(port, ch, RDA_UART_RXTX_BUFFER);
|
|
}
|
|
|
|
static void rda_uart_port_write(struct uart_port *port, const char *s,
|
|
u_int count)
|
|
{
|
|
u32 old_irq_mask;
|
|
unsigned long flags;
|
|
int locked;
|
|
|
|
local_irq_save(flags);
|
|
|
|
if (port->sysrq) {
|
|
locked = 0;
|
|
} else if (oops_in_progress) {
|
|
locked = spin_trylock(&port->lock);
|
|
} else {
|
|
spin_lock(&port->lock);
|
|
locked = 1;
|
|
}
|
|
|
|
old_irq_mask = rda_uart_read(port, RDA_UART_IRQ_MASK);
|
|
rda_uart_write(port, 0, RDA_UART_IRQ_MASK);
|
|
|
|
uart_console_write(port, s, count, rda_console_putchar);
|
|
|
|
/* wait until all contents have been sent out */
|
|
while (!(rda_uart_read(port, RDA_UART_STATUS) & RDA_UART_TX_FIFO_MASK))
|
|
cpu_relax();
|
|
|
|
rda_uart_write(port, old_irq_mask, RDA_UART_IRQ_MASK);
|
|
|
|
if (locked)
|
|
spin_unlock(&port->lock);
|
|
|
|
local_irq_restore(flags);
|
|
}
|
|
|
|
static void rda_uart_console_write(struct console *co, const char *s,
|
|
u_int count)
|
|
{
|
|
struct rda_uart_port *rda_port;
|
|
|
|
rda_port = rda_uart_ports[co->index];
|
|
if (!rda_port)
|
|
return;
|
|
|
|
rda_uart_port_write(&rda_port->port, s, count);
|
|
}
|
|
|
|
static int rda_uart_console_setup(struct console *co, char *options)
|
|
{
|
|
struct rda_uart_port *rda_port;
|
|
int baud = 921600;
|
|
int bits = 8;
|
|
int parity = 'n';
|
|
int flow = 'n';
|
|
|
|
if (co->index < 0 || co->index >= RDA_UART_PORT_NUM)
|
|
return -EINVAL;
|
|
|
|
rda_port = rda_uart_ports[co->index];
|
|
if (!rda_port || !rda_port->port.membase)
|
|
return -ENODEV;
|
|
|
|
if (options)
|
|
uart_parse_options(options, &baud, &parity, &bits, &flow);
|
|
|
|
return uart_set_options(&rda_port->port, co, baud, parity, bits, flow);
|
|
}
|
|
|
|
static struct console rda_uart_console = {
|
|
.name = RDA_UART_DEV_NAME,
|
|
.write = rda_uart_console_write,
|
|
.device = uart_console_device,
|
|
.setup = rda_uart_console_setup,
|
|
.flags = CON_PRINTBUFFER,
|
|
.index = -1,
|
|
.data = &rda_uart_driver,
|
|
};
|
|
|
|
static int __init rda_uart_console_init(void)
|
|
{
|
|
register_console(&rda_uart_console);
|
|
|
|
return 0;
|
|
}
|
|
console_initcall(rda_uart_console_init);
|
|
|
|
static void rda_uart_early_console_write(struct console *co,
|
|
const char *s,
|
|
u_int count)
|
|
{
|
|
struct earlycon_device *dev = co->data;
|
|
|
|
rda_uart_port_write(&dev->port, s, count);
|
|
}
|
|
|
|
static int __init
|
|
rda_uart_early_console_setup(struct earlycon_device *device, const char *opt)
|
|
{
|
|
if (!device->port.membase)
|
|
return -ENODEV;
|
|
|
|
device->con->write = rda_uart_early_console_write;
|
|
|
|
return 0;
|
|
}
|
|
|
|
OF_EARLYCON_DECLARE(rda, "rda,8810pl-uart",
|
|
rda_uart_early_console_setup);
|
|
|
|
#define RDA_UART_CONSOLE (&rda_uart_console)
|
|
#else
|
|
#define RDA_UART_CONSOLE NULL
|
|
#endif /* CONFIG_SERIAL_RDA_CONSOLE */
|
|
|
|
static struct uart_driver rda_uart_driver = {
|
|
.owner = THIS_MODULE,
|
|
.driver_name = "rda-uart",
|
|
.dev_name = RDA_UART_DEV_NAME,
|
|
.nr = RDA_UART_PORT_NUM,
|
|
.cons = RDA_UART_CONSOLE,
|
|
};
|
|
|
|
static const struct of_device_id rda_uart_dt_matches[] = {
|
|
{ .compatible = "rda,8810pl-uart" },
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, rda_uart_dt_matches);
|
|
|
|
static int rda_uart_probe(struct platform_device *pdev)
|
|
{
|
|
struct resource *res_mem;
|
|
struct rda_uart_port *rda_port;
|
|
int ret, irq;
|
|
|
|
if (pdev->dev.of_node)
|
|
pdev->id = of_alias_get_id(pdev->dev.of_node, "serial");
|
|
|
|
if (pdev->id < 0 || pdev->id >= RDA_UART_PORT_NUM) {
|
|
dev_err(&pdev->dev, "id %d out of range\n", pdev->id);
|
|
return -EINVAL;
|
|
}
|
|
|
|
res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
if (!res_mem) {
|
|
dev_err(&pdev->dev, "could not get mem\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
irq = platform_get_irq(pdev, 0);
|
|
if (irq < 0) {
|
|
dev_err(&pdev->dev, "could not get irq\n");
|
|
return irq;
|
|
}
|
|
|
|
if (rda_uart_ports[pdev->id]) {
|
|
dev_err(&pdev->dev, "port %d already allocated\n", pdev->id);
|
|
return -EBUSY;
|
|
}
|
|
|
|
rda_port = devm_kzalloc(&pdev->dev, sizeof(*rda_port), GFP_KERNEL);
|
|
if (!rda_port)
|
|
return -ENOMEM;
|
|
|
|
rda_port->clk = devm_clk_get(&pdev->dev, NULL);
|
|
if (IS_ERR(rda_port->clk)) {
|
|
dev_err(&pdev->dev, "could not get clk\n");
|
|
return PTR_ERR(rda_port->clk);
|
|
}
|
|
|
|
rda_port->port.dev = &pdev->dev;
|
|
rda_port->port.regshift = 0;
|
|
rda_port->port.line = pdev->id;
|
|
rda_port->port.type = PORT_RDA;
|
|
rda_port->port.iotype = UPIO_MEM;
|
|
rda_port->port.mapbase = res_mem->start;
|
|
rda_port->port.irq = irq;
|
|
rda_port->port.uartclk = clk_get_rate(rda_port->clk);
|
|
if (rda_port->port.uartclk == 0) {
|
|
dev_err(&pdev->dev, "clock rate is zero\n");
|
|
return -EINVAL;
|
|
}
|
|
rda_port->port.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
|
|
UPF_LOW_LATENCY;
|
|
rda_port->port.x_char = 0;
|
|
rda_port->port.fifosize = RDA_UART_TX_FIFO_SIZE;
|
|
rda_port->port.ops = &rda_uart_ops;
|
|
|
|
rda_uart_ports[pdev->id] = rda_port;
|
|
platform_set_drvdata(pdev, rda_port);
|
|
|
|
ret = uart_add_one_port(&rda_uart_driver, &rda_port->port);
|
|
if (ret)
|
|
rda_uart_ports[pdev->id] = NULL;
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int rda_uart_remove(struct platform_device *pdev)
|
|
{
|
|
struct rda_uart_port *rda_port = platform_get_drvdata(pdev);
|
|
|
|
uart_remove_one_port(&rda_uart_driver, &rda_port->port);
|
|
rda_uart_ports[pdev->id] = NULL;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver rda_uart_platform_driver = {
|
|
.probe = rda_uart_probe,
|
|
.remove = rda_uart_remove,
|
|
.driver = {
|
|
.name = "rda-uart",
|
|
.of_match_table = rda_uart_dt_matches,
|
|
},
|
|
};
|
|
|
|
static int __init rda_uart_init(void)
|
|
{
|
|
int ret;
|
|
|
|
ret = uart_register_driver(&rda_uart_driver);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = platform_driver_register(&rda_uart_platform_driver);
|
|
if (ret)
|
|
uart_unregister_driver(&rda_uart_driver);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void __init rda_uart_exit(void)
|
|
{
|
|
platform_driver_unregister(&rda_uart_platform_driver);
|
|
uart_unregister_driver(&rda_uart_driver);
|
|
}
|
|
|
|
module_init(rda_uart_init);
|
|
module_exit(rda_uart_exit);
|
|
|
|
MODULE_AUTHOR("Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>");
|
|
MODULE_DESCRIPTION("RDA8810PL serial device driver");
|
|
MODULE_LICENSE("GPL");
|