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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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e08a976a16
Misc updates from mlx5-next branch:
1) Add the required HW definitions and structures for upcoming TLS
support.
2) Add support for MCQI and MCQS hardware registers for fw version query.
3) Added hardware bits and structures definitions for sub-functions
4) Small code cleanup and improvement for PF pci driver.
5) Bluefield (ECPF) updates and refactoring for better E-Switch
management on ECPF embedded CPU NIC:
5.1) Consolidate querying eswitch number of VFs
5.2) Register event handler at the correct E-Switch init stage
5.3) Setup PF's inline mode and vlan pop when the ECPF is the
E-Swtich manager ( the host PF is basically a VF ).
5.4) Handle Vport UC address changes in switchdev mode.
6) Cleanup the rep and netdev reference when unloading IB rep.
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
i# All conflicts fixed but you are still merging.
99 lines
2.5 KiB
C
99 lines
2.5 KiB
C
/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
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/*
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* Copyright (c) 2018 Mellanox Technologies. All rights reserved.
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*/
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#ifndef _MLX5_ESWITCH_
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#define _MLX5_ESWITCH_
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#include <linux/mlx5/driver.h>
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#include <net/devlink.h>
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#define MLX5_ESWITCH_MANAGER(mdev) MLX5_CAP_GEN(mdev, eswitch_manager)
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enum {
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MLX5_ESWITCH_NONE,
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MLX5_ESWITCH_LEGACY,
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MLX5_ESWITCH_OFFLOADS
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};
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enum {
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REP_ETH,
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REP_IB,
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NUM_REP_TYPES,
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};
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enum {
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REP_UNREGISTERED,
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REP_REGISTERED,
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REP_LOADED,
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};
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struct mlx5_eswitch_rep;
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struct mlx5_eswitch_rep_ops {
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int (*load)(struct mlx5_core_dev *dev, struct mlx5_eswitch_rep *rep);
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void (*unload)(struct mlx5_eswitch_rep *rep);
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void *(*get_proto_dev)(struct mlx5_eswitch_rep *rep);
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};
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struct mlx5_eswitch_rep_data {
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void *priv;
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atomic_t state;
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};
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struct mlx5_eswitch_rep {
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struct mlx5_eswitch_rep_data rep_data[NUM_REP_TYPES];
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u16 vport;
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u8 hw_id[ETH_ALEN];
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u16 vlan;
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/* Only IB rep is using vport_index */
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u16 vport_index;
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u32 vlan_refcount;
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};
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void mlx5_eswitch_register_vport_reps(struct mlx5_eswitch *esw,
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const struct mlx5_eswitch_rep_ops *ops,
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u8 rep_type);
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void mlx5_eswitch_unregister_vport_reps(struct mlx5_eswitch *esw, u8 rep_type);
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void *mlx5_eswitch_get_proto_dev(struct mlx5_eswitch *esw,
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u16 vport_num,
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u8 rep_type);
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struct mlx5_eswitch_rep *mlx5_eswitch_vport_rep(struct mlx5_eswitch *esw,
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u16 vport_num);
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void *mlx5_eswitch_uplink_get_proto_dev(struct mlx5_eswitch *esw, u8 rep_type);
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u8 mlx5_eswitch_mode(struct mlx5_eswitch *esw);
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struct mlx5_flow_handle *
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mlx5_eswitch_add_send_to_vport_rule(struct mlx5_eswitch *esw,
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u16 vport_num, u32 sqn);
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u16 mlx5_eswitch_get_total_vports(const struct mlx5_core_dev *dev);
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#ifdef CONFIG_MLX5_ESWITCH
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enum devlink_eswitch_encap_mode
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mlx5_eswitch_get_encap_mode(const struct mlx5_core_dev *dev);
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bool mlx5_eswitch_vport_match_metadata_enabled(const struct mlx5_eswitch *esw);
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u32 mlx5_eswitch_get_vport_metadata_for_match(const struct mlx5_eswitch *esw,
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u16 vport_num);
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#else /* CONFIG_MLX5_ESWITCH */
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static inline enum devlink_eswitch_encap_mode
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mlx5_eswitch_get_encap_mode(const struct mlx5_core_dev *dev)
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{
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return DEVLINK_ESWITCH_ENCAP_MODE_NONE;
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}
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static inline bool
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mlx5_eswitch_vport_match_metadata_enabled(const struct mlx5_eswitch *esw)
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{
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return false;
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};
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static inline u32
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mlx5_eswitch_get_vport_metadata_for_match(const struct mlx5_eswitch *esw,
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int vport_num)
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{
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return 0;
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};
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#endif /* CONFIG_MLX5_ESWITCH */
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#endif
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