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![Linus Torvalds](/assets/img/avatar_default.png)
cycle: Core changes: - Device links can optionally be added between a pin control producer and its consumers. This will affect how the system power management is handled: a pin controller will not suspend before all of its consumers have been suspended. This was necessary for the ST Microelectronics STMFX expander and need to be tested on other systems as well: it makes sense to make this default in the long run. Right now it is opt-in per driver. - Drive strength can be specified in microamps. With decreases in silicon technology, milliamps isn't granular enough, let's make it possible to select drive strengths in microamps. Right now the Meson (AMlogic) driver needs this. New drivers: - New subdriver for the Tegra 194 SoC. - New subdriver for the Qualcomm SDM845. - New subdriver for the Qualcomm SM8150. - New subdriver for the Freescale i.MX8MN (Freescale is now a product line of NXP). - New subdriver for Marvell MV98DX1135. Driver improvements: - The Bitmain BM1880 driver now supports pin config in addition to muxing. - The Qualcomm drivers can now reserve some GPIOs as taken aside and not usable for users. This is used in ACPI systems to take out some GPIO lines used by the BIOS so that noone else (neither kernel nor userspace) will play with them by mistake and crash the machine. - A slew of refurbishing around the Aspeed drivers (board management controllers for servers) in preparation for the new Aspeed AST2600 SoC. - A slew of improvements over the SH PFC drivers as usual. - Misc cleanups and fixes. -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAl0oTPcACgkQQRCzN7AZ XXNTsw//aNPfkJS8gRszv58G56lyuO8h6Cq4m5eDpzhlpjx5qjELgi9h2UNGINqD 7CWxo35ufbKe0fDIcqpXmtuDMtSu6MuKT3SMepuw9uf9wxyndK4RIuyb0lpAJrx2 +NMPxzS+ARlrMmcfvXPRyPWHqAkXsQk6zcCgiuNCPtROkOZgs1YZ3+pemZw2/FMq gSLTO/95p0TPWr6YAlpByqfsA1A/onEm9HOiU2INV7DrAfUj7mnkuC1nZ4IJDFcv Gn6qQVQPah+MBzkwt4WXy5kDRozCIbg7x+FQBw3KAO23TrLDTFuNsYIWGFcP2CN2 eT8iSP3cWrXNUuEgcPD59aO07rhFooT+QBQFt2ih1dJCV1u/795wb57nxSh1YDcO M2tG+AW2EZky65FXwhLW2rq3LvmTM4kiEz3mA/DrcOAKvvQllK+6FKEhNy0StstP yvvlqoXdgH3sfOnWTAyHr35qA/pMuGEXSryWTJPqpflCvZ3wxNk+IV5nyPAtfaFz CK7U0Ya7NaEp/5ZlpE720apJ4uSqmRrLwk5Y1eKQvT46mGOk3rC9ZPIMXc8mB10/ mJ9mTubi1t4uIPnBl/T1T7f8QhNtr9hOY6wjLf1LoMeJ1XVNBqA+2uydOlBJ1iop RQ7y/Jl1SZ/gBzKCmvjPHT2+0Oui9oXGd9bQi0xQKO5Lus/nAIg= =Wdw1 -----END PGP SIGNATURE----- Merge tag 'pinctrl-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "This is the bulk of pin control changes for the v5.3 kernel cycle: Core changes: - Device links can optionally be added between a pin control producer and its consumers. This will affect how the system power management is handled: a pin controller will not suspend before all of its consumers have been suspended. This was necessary for the ST Microelectronics STMFX expander and need to be tested on other systems as well: it makes sense to make this default in the long run. Right now it is opt-in per driver. - Drive strength can be specified in microamps. With decreases in silicon technology, milliamps isn't granular enough, let's make it possible to select drive strengths in microamps. Right now the Meson (AMlogic) driver needs this. New drivers: - New subdriver for the Tegra 194 SoC. - New subdriver for the Qualcomm SDM845. - New subdriver for the Qualcomm SM8150. - New subdriver for the Freescale i.MX8MN (Freescale is now a product line of NXP). - New subdriver for Marvell MV98DX1135. Driver improvements: - The Bitmain BM1880 driver now supports pin config in addition to muxing. - The Qualcomm drivers can now reserve some GPIOs as taken aside and not usable for users. This is used in ACPI systems to take out some GPIO lines used by the BIOS so that noone else (neither kernel nor userspace) will play with them by mistake and crash the machine. - A slew of refurbishing around the Aspeed drivers (board management controllers for servers) in preparation for the new Aspeed AST2600 SoC. - A slew of improvements over the SH PFC drivers as usual. - Misc cleanups and fixes" * tag 'pinctrl-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (106 commits) pinctrl: aspeed: Strip moved macros and structs from private header pinctrl: aspeed: Fix missed include pinctrl: baytrail: Use GENMASK() consistently pinctrl: baytrail: Re-use data structures from pinctrl-intel.h pinctrl: baytrail: Use defined macro instead of magic in byt_get_gpio_mux() pinctrl: qcom: Add SM8150 pinctrl driver dt-bindings: pinctrl: qcom: Add SM8150 pinctrl binding dt-bindings: pinctrl: qcom: Document missing gpio nodes pinctrl: aspeed: Add implementation-related documentation pinctrl: aspeed: Split out pinmux from general pinctrl pinctrl: aspeed: Clarify comment about strapping W1C pinctrl: aspeed: Correct comment that is no longer true MAINTAINERS: Add entry for ASPEED pinctrl drivers dt-bindings: pinctrl: aspeed: Convert AST2500 bindings to json-schema dt-bindings: pinctrl: aspeed: Convert AST2400 bindings to json-schema dt-bindings: pinctrl: aspeed: Split bindings document in two pinctrl: qcom: Add irq_enable callback for msm gpio pinctrl: madera: Fixup SPDX headers pinctrl: qcom: sdm845: Fix CONFIG preprocessor guard pinctrl: tegra: Add bitmask support for parked bits ...
203 lines
7.4 KiB
C
203 lines
7.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Interface the pinctrl subsystem
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*
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* Copyright (C) 2011 ST-Ericsson SA
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* Written on behalf of Linaro for ST-Ericsson
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* This interface is used in the core to keep track of pins.
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*
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* Author: Linus Walleij <linus.walleij@linaro.org>
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*/
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#ifndef __LINUX_PINCTRL_PINCTRL_H
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#define __LINUX_PINCTRL_PINCTRL_H
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#include <linux/radix-tree.h>
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#include <linux/list.h>
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#include <linux/seq_file.h>
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#include <linux/pinctrl/pinctrl-state.h>
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#include <linux/pinctrl/devinfo.h>
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struct device;
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struct pinctrl_dev;
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struct pinctrl_map;
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struct pinmux_ops;
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struct pinconf_ops;
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struct pin_config_item;
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struct gpio_chip;
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struct device_node;
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/**
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* struct pinctrl_pin_desc - boards/machines provide information on their
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* pins, pads or other muxable units in this struct
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* @number: unique pin number from the global pin number space
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* @name: a name for this pin
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* @drv_data: driver-defined per-pin data. pinctrl core does not touch this
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*/
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struct pinctrl_pin_desc {
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unsigned number;
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const char *name;
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void *drv_data;
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};
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/* Convenience macro to define a single named or anonymous pin descriptor */
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#define PINCTRL_PIN(a, b) { .number = a, .name = b }
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#define PINCTRL_PIN_ANON(a) { .number = a }
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/**
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* struct pinctrl_gpio_range - each pin controller can provide subranges of
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* the GPIO number space to be handled by the controller
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* @node: list node for internal use
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* @name: a name for the chip in this range
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* @id: an ID number for the chip in this range
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* @base: base offset of the GPIO range
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* @pin_base: base pin number of the GPIO range if pins == NULL
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* @pins: enumeration of pins in GPIO range or NULL
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* @npins: number of pins in the GPIO range, including the base number
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* @gc: an optional pointer to a gpio_chip
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*/
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struct pinctrl_gpio_range {
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struct list_head node;
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const char *name;
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unsigned int id;
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unsigned int base;
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unsigned int pin_base;
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unsigned const *pins;
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unsigned int npins;
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struct gpio_chip *gc;
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};
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/**
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* struct pinctrl_ops - global pin control operations, to be implemented by
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* pin controller drivers.
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* @get_groups_count: Returns the count of total number of groups registered.
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* @get_group_name: return the group name of the pin group
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* @get_group_pins: return an array of pins corresponding to a certain
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* group selector @pins, and the size of the array in @num_pins
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* @pin_dbg_show: optional debugfs display hook that will provide per-device
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* info for a certain pin in debugfs
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* @dt_node_to_map: parse a device tree "pin configuration node", and create
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* mapping table entries for it. These are returned through the @map and
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* @num_maps output parameters. This function is optional, and may be
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* omitted for pinctrl drivers that do not support device tree.
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* @dt_free_map: free mapping table entries created via @dt_node_to_map. The
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* top-level @map pointer must be freed, along with any dynamically
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* allocated members of the mapping table entries themselves. This
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* function is optional, and may be omitted for pinctrl drivers that do
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* not support device tree.
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*/
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struct pinctrl_ops {
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int (*get_groups_count) (struct pinctrl_dev *pctldev);
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const char *(*get_group_name) (struct pinctrl_dev *pctldev,
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unsigned selector);
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int (*get_group_pins) (struct pinctrl_dev *pctldev,
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unsigned selector,
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const unsigned **pins,
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unsigned *num_pins);
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void (*pin_dbg_show) (struct pinctrl_dev *pctldev, struct seq_file *s,
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unsigned offset);
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int (*dt_node_to_map) (struct pinctrl_dev *pctldev,
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struct device_node *np_config,
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struct pinctrl_map **map, unsigned *num_maps);
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void (*dt_free_map) (struct pinctrl_dev *pctldev,
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struct pinctrl_map *map, unsigned num_maps);
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};
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/**
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* struct pinctrl_desc - pin controller descriptor, register this to pin
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* control subsystem
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* @name: name for the pin controller
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* @pins: an array of pin descriptors describing all the pins handled by
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* this pin controller
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* @npins: number of descriptors in the array, usually just ARRAY_SIZE()
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* of the pins field above
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* @pctlops: pin control operation vtable, to support global concepts like
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* grouping of pins, this is optional.
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* @pmxops: pinmux operations vtable, if you support pinmuxing in your driver
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* @confops: pin config operations vtable, if you support pin configuration in
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* your driver
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* @owner: module providing the pin controller, used for refcounting
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* @num_custom_params: Number of driver-specific custom parameters to be parsed
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* from the hardware description
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* @custom_params: List of driver_specific custom parameters to be parsed from
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* the hardware description
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* @custom_conf_items: Information how to print @params in debugfs, must be
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* the same size as the @custom_params, i.e. @num_custom_params
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* @link_consumers: If true create a device link between pinctrl and its
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* consumers (i.e. the devices requesting pin control states). This is
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* sometimes necessary to ascertain the right suspend/resume order for
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* example.
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*/
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struct pinctrl_desc {
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const char *name;
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const struct pinctrl_pin_desc *pins;
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unsigned int npins;
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const struct pinctrl_ops *pctlops;
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const struct pinmux_ops *pmxops;
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const struct pinconf_ops *confops;
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struct module *owner;
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#ifdef CONFIG_GENERIC_PINCONF
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unsigned int num_custom_params;
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const struct pinconf_generic_params *custom_params;
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const struct pin_config_item *custom_conf_items;
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#endif
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bool link_consumers;
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};
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/* External interface to pin controller */
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extern int pinctrl_register_and_init(struct pinctrl_desc *pctldesc,
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struct device *dev, void *driver_data,
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struct pinctrl_dev **pctldev);
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extern int pinctrl_enable(struct pinctrl_dev *pctldev);
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/* Please use pinctrl_register_and_init() and pinctrl_enable() instead */
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extern struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc,
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struct device *dev, void *driver_data);
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extern void pinctrl_unregister(struct pinctrl_dev *pctldev);
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extern int devm_pinctrl_register_and_init(struct device *dev,
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struct pinctrl_desc *pctldesc,
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void *driver_data,
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struct pinctrl_dev **pctldev);
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/* Please use devm_pinctrl_register_and_init() instead */
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extern struct pinctrl_dev *devm_pinctrl_register(struct device *dev,
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struct pinctrl_desc *pctldesc,
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void *driver_data);
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extern void devm_pinctrl_unregister(struct device *dev,
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struct pinctrl_dev *pctldev);
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extern void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev,
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struct pinctrl_gpio_range *range);
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extern void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev,
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struct pinctrl_gpio_range *ranges,
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unsigned nranges);
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extern void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev,
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struct pinctrl_gpio_range *range);
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extern struct pinctrl_dev *pinctrl_find_and_add_gpio_range(const char *devname,
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struct pinctrl_gpio_range *range);
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extern struct pinctrl_gpio_range *
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pinctrl_find_gpio_range_from_pin(struct pinctrl_dev *pctldev,
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unsigned int pin);
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extern int pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
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const char *pin_group, const unsigned **pins,
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unsigned *num_pins);
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#ifdef CONFIG_OF
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extern struct pinctrl_dev *of_pinctrl_get(struct device_node *np);
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#else
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static inline
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struct pinctrl_dev *of_pinctrl_get(struct device_node *np)
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{
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return NULL;
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}
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#endif /* CONFIG_OF */
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extern const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev);
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extern const char *pinctrl_dev_get_devname(struct pinctrl_dev *pctldev);
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extern void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev);
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#endif /* __LINUX_PINCTRL_PINCTRL_H */
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