90 lines
1.9 KiB
YAML
90 lines
1.9 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/media/st,stm32-dcmipp.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: STMicroelectronics STM32 DCMIPP Digital Camera Memory Interface Pixel Processor
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maintainers:
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- Hugues Fruchet <hugues.fruchet@foss.st.com>
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- Alain Volmat <alain.volmat@foss.st.com>
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properties:
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compatible:
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const: st,stm32mp13-dcmipp
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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resets:
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maxItems: 1
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port:
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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description:
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DCMIPP supports a single port node with parallel bus.
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properties:
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endpoint:
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$ref: video-interfaces.yaml#
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unevaluatedProperties: false
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properties:
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bus-type:
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enum: [5, 6]
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default: 5
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bus-width:
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enum: [8, 10, 12, 14]
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default: 8
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pclk-sample: true
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hsync-active: true
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vsync-active: true
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required:
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- pclk-sample
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- resets
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- port
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/stm32mp13-clks.h>
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#include <dt-bindings/reset/stm32mp13-resets.h>
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dcmipp@5a000000 {
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compatible = "st,stm32mp13-dcmipp";
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reg = <0x5a000000 0x400>;
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interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
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resets = <&rcc DCMIPP_R>;
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clocks = <&rcc DCMIPP_K>;
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port {
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endpoint {
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remote-endpoint = <&mipid02_2>;
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bus-width = <8>;
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hsync-active = <0>;
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vsync-active = <0>;
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pclk-sample = <0>;
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};
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};
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};
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...
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