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41a54482c0
We are about to modify the VGIC to allocate all data structures dynamically and store mapped IRQ information on a per-IRQ struct, which is indeed allocated dynamically at init time. Therefore, we cannot record the mapped IRQ info from the timer at timer reset time like it's done now, because VCPU reset happens before timer init. A possible later time to do this is on the first run of a per VCPU, it just requires us to move the enable state to be a per-VCPU state and do the lookup of the physical IRQ number when we are about to run the VCPU. Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
68 lines
1.9 KiB
C
68 lines
1.9 KiB
C
/*
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* Copyright (C) 2012-2015 - ARM Ltd
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <clocksource/arm_arch_timer.h>
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#include <linux/compiler.h>
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#include <linux/kvm_host.h>
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#include <asm/kvm_hyp.h>
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/* vcpu is already in the HYP VA space */
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void __hyp_text __timer_save_state(struct kvm_vcpu *vcpu)
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{
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struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
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u64 val;
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if (timer->enabled) {
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timer->cntv_ctl = read_sysreg_el0(cntv_ctl);
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timer->cntv_cval = read_sysreg_el0(cntv_cval);
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}
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/* Disable the virtual timer */
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write_sysreg_el0(0, cntv_ctl);
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/* Allow physical timer/counter access for the host */
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val = read_sysreg(cnthctl_el2);
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val |= CNTHCTL_EL1PCTEN | CNTHCTL_EL1PCEN;
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write_sysreg(val, cnthctl_el2);
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/* Clear cntvoff for the host */
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write_sysreg(0, cntvoff_el2);
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}
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void __hyp_text __timer_restore_state(struct kvm_vcpu *vcpu)
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{
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struct kvm *kvm = kern_hyp_va(vcpu->kvm);
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struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
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u64 val;
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/*
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* Disallow physical timer access for the guest
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* Physical counter access is allowed
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*/
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val = read_sysreg(cnthctl_el2);
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val &= ~CNTHCTL_EL1PCEN;
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val |= CNTHCTL_EL1PCTEN;
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write_sysreg(val, cnthctl_el2);
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if (timer->enabled) {
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write_sysreg(kvm->arch.timer.cntvoff, cntvoff_el2);
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write_sysreg_el0(timer->cntv_cval, cntv_cval);
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isb();
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write_sysreg_el0(timer->cntv_ctl, cntv_ctl);
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}
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}
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