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![Anton Vorontsov](/assets/img/avatar_default.png)
CNS3xxx chips have SDHCI-compatible SDIO/SD/MMC controller. This patch adds the support using sdhci-cns3xxx driver. Signed-off-by: Anton Vorontsov <avorontsov@mvista.com>
59 lines
1.4 KiB
C
59 lines
1.4 KiB
C
/*
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* CNS3xxx common devices
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*
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* Copyright 2008 Cavium Networks
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* Scott Shu
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* Copyright 2010 MontaVista Software, LLC.
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* Anton Vorontsov <avorontsov@mvista.com>
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*
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* This file is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, Version 2, as
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* published by the Free Software Foundation.
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*/
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#include <linux/io.h>
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#include <linux/init.h>
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#include <linux/compiler.h>
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#include <linux/platform_device.h>
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#include <mach/cns3xxx.h>
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#include <mach/irqs.h>
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#include "core.h"
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#include "devices.h"
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/*
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* SDHCI
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*/
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static struct resource cns3xxx_sdhci_resources[] = {
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[0] = {
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.start = CNS3XXX_SDIO_BASE,
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.end = CNS3XXX_SDIO_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_CNS3XXX_SDIO,
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.end = IRQ_CNS3XXX_SDIO,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device cns3xxx_sdhci_pdev = {
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.name = "sdhci-cns3xxx",
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.id = 0,
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.num_resources = ARRAY_SIZE(cns3xxx_sdhci_resources),
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.resource = cns3xxx_sdhci_resources,
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};
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void __init cns3xxx_sdhci_init(void)
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{
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u32 __iomem *gpioa = __io(CNS3XXX_MISC_BASE_VIRT + 0x0014);
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u32 gpioa_pins = __raw_readl(gpioa);
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/* MMC/SD pins share with GPIOA */
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gpioa_pins |= 0x1fff0004;
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__raw_writel(gpioa_pins, gpioa);
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cns3xxx_pwr_clk_en(CNS3XXX_PWR_CLK_EN(SDIO));
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cns3xxx_pwr_soft_rst(CNS3XXX_PWR_SOFTWARE_RST(SDIO));
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platform_device_register(&cns3xxx_sdhci_pdev);
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}
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