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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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3847dab774
This patch adds the necessary code to patch a running kernel at runtime to improve performance. The current implementation offers a few optimizations variants: - When running a SMP kernel on a single UP processor, unwanted assembler statements like locking functions are overwritten with NOPs. When multiple instructions shall be skipped, one branch instruction is used instead of multiple nop instructions. - In the UP case, some pdtlb and pitlb instructions are patched to become pdtlb,l and pitlb,l which only flushes the CPU-local tlb entries instead of broadcasting the flush to other CPUs in the system and thus may improve performance. - fic and fdc instructions are skipped if no I- or D-caches are installed. This should speed up qemu emulation and cacheless systems. - If no cache coherence is needed for IO operations, the relevant fdc and sync instructions in the sba and ccio drivers are replaced by nops. - On systems which share I- and D-TLBs and thus don't have a seperate instruction TLB, the pitlb instruction is replaced by a nop. Live-patching is done early in the boot process, just after having run the system inventory. No drivers are running and thus no external interrupts should arrive. So the hope is that no TLB exceptions will occur during the patching. If this turns out to be wrong we will probably need to do the patching in real-mode. Signed-off-by: Helge Deller <deller@gmx.de>
178 lines
3.6 KiB
ArmAsm
178 lines
3.6 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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/* Kernel link layout for various "sections"
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*
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* Copyright (C) 1999-2003 Matthew Wilcox <willy at parisc-linux.org>
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* Copyright (C) 2000-2003 Paul Bame <bame at parisc-linux.org>
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* Copyright (C) 2000 John Marvin <jsm at parisc-linux.org>
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* Copyright (C) 2000 Michael Ang <mang with subcarrier.org>
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* Copyright (C) 2002 Randolph Chung <tausq with parisc-linux.org>
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* Copyright (C) 2003 James Bottomley <jejb with parisc-linux.org>
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* Copyright (C) 2006-2013 Helge Deller <deller@gmx.de>
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*/
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/*
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* Put page table entries (swapper_pg_dir) as the first thing in .bss. This
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* will ensure that it has .bss alignment (PAGE_SIZE).
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*/
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#define BSS_FIRST_SECTIONS *(.data..vm0.pmd) \
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*(.data..vm0.pgd) \
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*(.data..vm0.pte)
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#include <asm-generic/vmlinux.lds.h>
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/* needed for the processor specific cache alignment size */
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#include <asm/cache.h>
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#include <asm/page.h>
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#include <asm/asm-offsets.h>
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#include <asm/thread_info.h>
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/* ld script to make hppa Linux kernel */
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#ifndef CONFIG_64BIT
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OUTPUT_FORMAT("elf32-hppa-linux")
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OUTPUT_ARCH(hppa)
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#else
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OUTPUT_FORMAT("elf64-hppa-linux")
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OUTPUT_ARCH(hppa:hppa2.0w)
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#endif
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ENTRY(parisc_kernel_start)
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#ifndef CONFIG_64BIT
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jiffies = jiffies_64 + 4;
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#else
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jiffies = jiffies_64;
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#endif
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SECTIONS
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{
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. = KERNEL_BINARY_TEXT_START;
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__init_begin = .;
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HEAD_TEXT_SECTION
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INIT_TEXT_SECTION(8)
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. = ALIGN(PAGE_SIZE);
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INIT_DATA_SECTION(PAGE_SIZE)
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/* we have to discard exit text and such at runtime, not link time */
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.exit.text :
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{
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EXIT_TEXT
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}
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.exit.data :
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{
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EXIT_DATA
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}
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PERCPU_SECTION(8)
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. = ALIGN(4);
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.altinstructions : {
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__alt_instructions = .;
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*(.altinstructions)
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__alt_instructions_end = .;
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}
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. = ALIGN(HUGEPAGE_SIZE);
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__init_end = .;
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/* freed after init ends here */
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_text = .; /* Text and read-only data */
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_stext = .;
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.text ALIGN(PAGE_SIZE) : {
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TEXT_TEXT
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SCHED_TEXT
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CPUIDLE_TEXT
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LOCK_TEXT
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KPROBES_TEXT
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IRQENTRY_TEXT
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SOFTIRQENTRY_TEXT
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*(.text.do_softirq)
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*(.text.sys_exit)
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*(.text.do_sigaltstack)
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*(.text.do_fork)
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*(.text.div)
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*($$*) /* millicode routines */
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*(.text.*)
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*(.fixup)
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*(.lock.text) /* out-of-line lock text */
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*(.gnu.warning)
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}
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. = ALIGN(PAGE_SIZE);
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_etext = .;
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/* End of text section */
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/* Start of data section */
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_sdata = .;
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/* Architecturally we need to keep __gp below 0x1000000 and thus
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* in front of RO_DATA_SECTION() which stores lots of tracepoint
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* and ftrace symbols. */
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#ifdef CONFIG_64BIT
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. = ALIGN(16);
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/* Linkage tables */
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.opd : {
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__start_opd = .;
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*(.opd)
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__end_opd = .;
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} PROVIDE (__gp = .);
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.plt : {
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*(.plt)
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}
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.dlt : {
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*(.dlt)
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}
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#endif
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RO_DATA_SECTION(8)
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/* RO because of BUILDTIME_EXTABLE_SORT */
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EXCEPTION_TABLE(8)
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NOTES
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/* unwind info */
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.PARISC.unwind : {
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__start___unwind = .;
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*(.PARISC.unwind)
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__stop___unwind = .;
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}
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/* writeable */
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/* Make sure this is page aligned so
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* that we can properly leave these
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* as writable
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*/
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. = ALIGN(HUGEPAGE_SIZE);
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data_start = .;
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/* Data */
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RW_DATA_SECTION(L1_CACHE_BYTES, PAGE_SIZE, PAGE_SIZE)
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/* PA-RISC locks requires 16-byte alignment */
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. = ALIGN(16);
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.data..lock_aligned : {
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*(.data..lock_aligned)
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}
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/* End of data section */
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_edata = .;
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/* BSS */
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BSS_SECTION(PAGE_SIZE, PAGE_SIZE, PAGE_SIZE)
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. = ALIGN(HUGEPAGE_SIZE);
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_end = . ;
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STABS_DEBUG
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.note 0 : { *(.note) }
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/* Sections to be discarded */
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DISCARDS
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/DISCARD/ : {
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#ifdef CONFIG_64BIT
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/* temporary hack until binutils is fixed to not emit these
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* for static binaries
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*/
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*(.interp)
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*(.dynsym)
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*(.dynstr)
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*(.dynamic)
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*(.hash)
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*(.gnu.hash)
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#endif
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}
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}
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