Vineet Gupta 63d2dfdbf4 ARC: cacheflush refactor #2: I and D caches lines to have same size ... Having them be different seems an obscure configuration. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>		2013-11-06 10:41:37 +05:30
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asm	ARC: cacheflush refactor #2: I and D caches lines to have same size	2013-11-06 10:41:37 +05:30
uapi/asm	ARC: stop using pt_regs->orig_r8	2013-06-22 19:23:26 +05:30