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The Ingenic JZ4760 and JZ4770 both have an extra DMA core named BDMA dedicated to the NAND and BCH controller, but which can also do memory-to-memory transfers. The JZ4760 additionally has a DMA core named MDMA dedicated to memory-to-memory transfers. The programming manual for the JZ4770 does have a bit for a MDMA clock, but does not seem to have the hardware wired in. Add macros for the MDMA and BDMA clocks to the dt-bindings include files, so that they can be used within Device Tree files. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Link: https://lore.kernel.org/r/20211220193319.114974-2-paul@crapouillou.net Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
59 lines
1.6 KiB
C
59 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* This header provides clock numbers for the ingenic,jz4770-cgu DT binding.
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*/
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#ifndef __DT_BINDINGS_CLOCK_JZ4770_CGU_H__
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#define __DT_BINDINGS_CLOCK_JZ4770_CGU_H__
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#define JZ4770_CLK_EXT 0
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#define JZ4770_CLK_OSC32K 1
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#define JZ4770_CLK_PLL0 2
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#define JZ4770_CLK_PLL1 3
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#define JZ4770_CLK_CCLK 4
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#define JZ4770_CLK_H0CLK 5
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#define JZ4770_CLK_H1CLK 6
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#define JZ4770_CLK_H2CLK 7
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#define JZ4770_CLK_C1CLK 8
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#define JZ4770_CLK_PCLK 9
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#define JZ4770_CLK_MMC0_MUX 10
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#define JZ4770_CLK_MMC0 11
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#define JZ4770_CLK_MMC1_MUX 12
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#define JZ4770_CLK_MMC1 13
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#define JZ4770_CLK_MMC2_MUX 14
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#define JZ4770_CLK_MMC2 15
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#define JZ4770_CLK_CIM 16
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#define JZ4770_CLK_UHC 17
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#define JZ4770_CLK_GPU 18
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#define JZ4770_CLK_BCH 19
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#define JZ4770_CLK_LPCLK_MUX 20
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#define JZ4770_CLK_GPS 21
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#define JZ4770_CLK_SSI_MUX 22
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#define JZ4770_CLK_PCM_MUX 23
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#define JZ4770_CLK_I2S 24
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#define JZ4770_CLK_OTG 25
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#define JZ4770_CLK_SSI0 26
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#define JZ4770_CLK_SSI1 27
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#define JZ4770_CLK_SSI2 28
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#define JZ4770_CLK_PCM0 29
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#define JZ4770_CLK_PCM1 30
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#define JZ4770_CLK_DMA 31
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#define JZ4770_CLK_I2C0 32
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#define JZ4770_CLK_I2C1 33
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#define JZ4770_CLK_I2C2 34
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#define JZ4770_CLK_UART0 35
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#define JZ4770_CLK_UART1 36
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#define JZ4770_CLK_UART2 37
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#define JZ4770_CLK_UART3 38
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#define JZ4770_CLK_IPU 39
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#define JZ4770_CLK_ADC 40
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#define JZ4770_CLK_AIC 41
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#define JZ4770_CLK_AUX 42
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#define JZ4770_CLK_VPU 43
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#define JZ4770_CLK_UHC_PHY 44
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#define JZ4770_CLK_OTG_PHY 45
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#define JZ4770_CLK_EXT512 46
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#define JZ4770_CLK_RTC 47
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#define JZ4770_CLK_BDMA 48
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#endif /* __DT_BINDINGS_CLOCK_JZ4770_CGU_H__ */
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