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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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Based on 1 normalized pattern(s): this software is licensed under the terms of the gnu general public license version 2 as published by the free software foundation and may be copied distributed and modified under those terms this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 285 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141900.642774971@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
179 lines
5.6 KiB
C
179 lines
5.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright 2015 Linaro Limited
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*/
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#ifndef _DT_BINDINGS_CLK_MSM_GCC_8916_H
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#define _DT_BINDINGS_CLK_MSM_GCC_8916_H
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#define GPLL0 0
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#define GPLL0_VOTE 1
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#define BIMC_PLL 2
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#define BIMC_PLL_VOTE 3
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#define GPLL1 4
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#define GPLL1_VOTE 5
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#define GPLL2 6
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#define GPLL2_VOTE 7
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#define PCNOC_BFDCD_CLK_SRC 8
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#define SYSTEM_NOC_BFDCD_CLK_SRC 9
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#define CAMSS_AHB_CLK_SRC 10
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#define APSS_AHB_CLK_SRC 11
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#define CSI0_CLK_SRC 12
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#define CSI1_CLK_SRC 13
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#define GFX3D_CLK_SRC 14
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#define VFE0_CLK_SRC 15
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#define BLSP1_QUP1_I2C_APPS_CLK_SRC 16
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#define BLSP1_QUP1_SPI_APPS_CLK_SRC 17
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#define BLSP1_QUP2_I2C_APPS_CLK_SRC 18
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#define BLSP1_QUP2_SPI_APPS_CLK_SRC 19
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#define BLSP1_QUP3_I2C_APPS_CLK_SRC 20
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#define BLSP1_QUP3_SPI_APPS_CLK_SRC 21
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#define BLSP1_QUP4_I2C_APPS_CLK_SRC 22
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#define BLSP1_QUP4_SPI_APPS_CLK_SRC 23
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#define BLSP1_QUP5_I2C_APPS_CLK_SRC 24
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#define BLSP1_QUP5_SPI_APPS_CLK_SRC 25
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#define BLSP1_QUP6_I2C_APPS_CLK_SRC 26
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#define BLSP1_QUP6_SPI_APPS_CLK_SRC 27
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#define BLSP1_UART1_APPS_CLK_SRC 28
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#define BLSP1_UART2_APPS_CLK_SRC 29
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#define CCI_CLK_SRC 30
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#define CAMSS_GP0_CLK_SRC 31
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#define CAMSS_GP1_CLK_SRC 32
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#define JPEG0_CLK_SRC 33
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#define MCLK0_CLK_SRC 34
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#define MCLK1_CLK_SRC 35
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#define CSI0PHYTIMER_CLK_SRC 36
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#define CSI1PHYTIMER_CLK_SRC 37
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#define CPP_CLK_SRC 38
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#define CRYPTO_CLK_SRC 39
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#define GP1_CLK_SRC 40
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#define GP2_CLK_SRC 41
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#define GP3_CLK_SRC 42
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#define BYTE0_CLK_SRC 43
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#define ESC0_CLK_SRC 44
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#define MDP_CLK_SRC 45
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#define PCLK0_CLK_SRC 46
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#define VSYNC_CLK_SRC 47
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#define PDM2_CLK_SRC 48
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#define SDCC1_APPS_CLK_SRC 49
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#define SDCC2_APPS_CLK_SRC 50
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#define APSS_TCU_CLK_SRC 51
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#define USB_HS_SYSTEM_CLK_SRC 52
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#define VCODEC0_CLK_SRC 53
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#define GCC_BLSP1_AHB_CLK 54
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#define GCC_BLSP1_SLEEP_CLK 55
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#define GCC_BLSP1_QUP1_I2C_APPS_CLK 56
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#define GCC_BLSP1_QUP1_SPI_APPS_CLK 57
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#define GCC_BLSP1_QUP2_I2C_APPS_CLK 58
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#define GCC_BLSP1_QUP2_SPI_APPS_CLK 59
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#define GCC_BLSP1_QUP3_I2C_APPS_CLK 60
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#define GCC_BLSP1_QUP3_SPI_APPS_CLK 61
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#define GCC_BLSP1_QUP4_I2C_APPS_CLK 62
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#define GCC_BLSP1_QUP4_SPI_APPS_CLK 63
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#define GCC_BLSP1_QUP5_I2C_APPS_CLK 64
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#define GCC_BLSP1_QUP5_SPI_APPS_CLK 65
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#define GCC_BLSP1_QUP6_I2C_APPS_CLK 66
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#define GCC_BLSP1_QUP6_SPI_APPS_CLK 67
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#define GCC_BLSP1_UART1_APPS_CLK 68
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#define GCC_BLSP1_UART2_APPS_CLK 69
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#define GCC_BOOT_ROM_AHB_CLK 70
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#define GCC_CAMSS_CCI_AHB_CLK 71
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#define GCC_CAMSS_CCI_CLK 72
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#define GCC_CAMSS_CSI0_AHB_CLK 73
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#define GCC_CAMSS_CSI0_CLK 74
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#define GCC_CAMSS_CSI0PHY_CLK 75
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#define GCC_CAMSS_CSI0PIX_CLK 76
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#define GCC_CAMSS_CSI0RDI_CLK 77
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#define GCC_CAMSS_CSI1_AHB_CLK 78
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#define GCC_CAMSS_CSI1_CLK 79
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#define GCC_CAMSS_CSI1PHY_CLK 80
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#define GCC_CAMSS_CSI1PIX_CLK 81
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#define GCC_CAMSS_CSI1RDI_CLK 82
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#define GCC_CAMSS_CSI_VFE0_CLK 83
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#define GCC_CAMSS_GP0_CLK 84
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#define GCC_CAMSS_GP1_CLK 85
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#define GCC_CAMSS_ISPIF_AHB_CLK 86
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#define GCC_CAMSS_JPEG0_CLK 87
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#define GCC_CAMSS_JPEG_AHB_CLK 88
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#define GCC_CAMSS_JPEG_AXI_CLK 89
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#define GCC_CAMSS_MCLK0_CLK 90
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#define GCC_CAMSS_MCLK1_CLK 91
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#define GCC_CAMSS_MICRO_AHB_CLK 92
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#define GCC_CAMSS_CSI0PHYTIMER_CLK 93
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#define GCC_CAMSS_CSI1PHYTIMER_CLK 94
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#define GCC_CAMSS_AHB_CLK 95
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#define GCC_CAMSS_TOP_AHB_CLK 96
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#define GCC_CAMSS_CPP_AHB_CLK 97
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#define GCC_CAMSS_CPP_CLK 98
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#define GCC_CAMSS_VFE0_CLK 99
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#define GCC_CAMSS_VFE_AHB_CLK 100
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#define GCC_CAMSS_VFE_AXI_CLK 101
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#define GCC_CRYPTO_AHB_CLK 102
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#define GCC_CRYPTO_AXI_CLK 103
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#define GCC_CRYPTO_CLK 104
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#define GCC_OXILI_GMEM_CLK 105
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#define GCC_GP1_CLK 106
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#define GCC_GP2_CLK 107
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#define GCC_GP3_CLK 108
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#define GCC_MDSS_AHB_CLK 109
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#define GCC_MDSS_AXI_CLK 110
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#define GCC_MDSS_BYTE0_CLK 111
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#define GCC_MDSS_ESC0_CLK 112
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#define GCC_MDSS_MDP_CLK 113
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#define GCC_MDSS_PCLK0_CLK 114
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#define GCC_MDSS_VSYNC_CLK 115
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#define GCC_MSS_CFG_AHB_CLK 116
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#define GCC_OXILI_AHB_CLK 117
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#define GCC_OXILI_GFX3D_CLK 118
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#define GCC_PDM2_CLK 119
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#define GCC_PDM_AHB_CLK 120
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#define GCC_PRNG_AHB_CLK 121
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#define GCC_SDCC1_AHB_CLK 122
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#define GCC_SDCC1_APPS_CLK 123
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#define GCC_SDCC2_AHB_CLK 124
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#define GCC_SDCC2_APPS_CLK 125
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#define GCC_GTCU_AHB_CLK 126
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#define GCC_JPEG_TBU_CLK 127
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#define GCC_MDP_TBU_CLK 128
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#define GCC_SMMU_CFG_CLK 129
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#define GCC_VENUS_TBU_CLK 130
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#define GCC_VFE_TBU_CLK 131
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#define GCC_USB2A_PHY_SLEEP_CLK 132
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#define GCC_USB_HS_AHB_CLK 133
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#define GCC_USB_HS_SYSTEM_CLK 134
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#define GCC_VENUS0_AHB_CLK 135
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#define GCC_VENUS0_AXI_CLK 136
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#define GCC_VENUS0_VCODEC0_CLK 137
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#define BIMC_DDR_CLK_SRC 138
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#define GCC_APSS_TCU_CLK 139
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#define GCC_GFX_TCU_CLK 140
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#define BIMC_GPU_CLK_SRC 141
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#define GCC_BIMC_GFX_CLK 142
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#define GCC_BIMC_GPU_CLK 143
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#define ULTAUDIO_LPAIF_PRI_I2S_CLK_SRC 144
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#define ULTAUDIO_LPAIF_SEC_I2S_CLK_SRC 145
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#define ULTAUDIO_LPAIF_AUX_I2S_CLK_SRC 146
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#define ULTAUDIO_XO_CLK_SRC 147
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#define ULTAUDIO_AHBFABRIC_CLK_SRC 148
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#define CODEC_DIGCODEC_CLK_SRC 149
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#define GCC_ULTAUDIO_PCNOC_MPORT_CLK 150
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#define GCC_ULTAUDIO_PCNOC_SWAY_CLK 151
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#define GCC_ULTAUDIO_AVSYNC_XO_CLK 152
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#define GCC_ULTAUDIO_STC_XO_CLK 153
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#define GCC_ULTAUDIO_AHBFABRIC_IXFABRIC_CLK 154
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#define GCC_ULTAUDIO_AHBFABRIC_IXFABRIC_LPM_CLK 155
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#define GCC_ULTAUDIO_LPAIF_PRI_I2S_CLK 156
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#define GCC_ULTAUDIO_LPAIF_SEC_I2S_CLK 157
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#define GCC_ULTAUDIO_LPAIF_AUX_I2S_CLK 158
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#define GCC_CODEC_DIGCODEC_CLK 159
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#define GCC_MSS_Q6_BIMC_AXI_CLK 160
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/* Indexes for GDSCs */
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#define BIMC_GDSC 0
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#define VENUS_GDSC 1
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#define MDSS_GDSC 2
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#define JPEG_GDSC 3
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#define VFE_GDSC 4
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#define OXILI_GDSC 5
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#endif
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