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d1492bbd47
Add documentation for PMIC7 ADC peripheral. For the PMIC7-type PMICs, ADC peripheral is present in HW for the following PMICs: PMK8350, PM8350, PM8350b, PMR735a and PMR735b. Of these, only the ADC peripheral on PMK8350 is exposed directly to SW. If SW needs to communicate with ADCs on other PMICs, it specifies the PMIC to PMK8350 through the newly added SID register and communication between PMK8350 ADC and other PMIC ADCs is carried out through PBS(Programmable Boot Sequence) at the firmware level. In addition, add definitions for ADC channels and virtual channel definitions (combination of ADC channel number and PMIC SID number) per PMIC, to be used by ADC clients for PMIC7. Signed-off-by: Jishnu Prakash <jprakash@codeaurora.org> Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
67 lines
2.9 KiB
C
67 lines
2.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2020, The Linux Foundation. All rights reserved.
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*/
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#ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H
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#define _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H
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#ifndef PM8350_SID
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#define PM8350_SID 1
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#endif
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/* ADC channels for PM8350_ADC for PMIC7 */
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#define PM8350_ADC7_REF_GND (PM8350_SID << 8 | 0x0)
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#define PM8350_ADC7_1P25VREF (PM8350_SID << 8 | 0x01)
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#define PM8350_ADC7_VREF_VADC (PM8350_SID << 8 | 0x02)
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#define PM8350_ADC7_DIE_TEMP (PM8350_SID << 8 | 0x03)
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#define PM8350_ADC7_AMUX_THM1 (PM8350_SID << 8 | 0x04)
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#define PM8350_ADC7_AMUX_THM2 (PM8350_SID << 8 | 0x05)
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#define PM8350_ADC7_AMUX_THM3 (PM8350_SID << 8 | 0x06)
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#define PM8350_ADC7_AMUX_THM4 (PM8350_SID << 8 | 0x07)
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#define PM8350_ADC7_AMUX_THM5 (PM8350_SID << 8 | 0x08)
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#define PM8350_ADC7_GPIO1 (PM8350_SID << 8 | 0x0a)
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#define PM8350_ADC7_GPIO2 (PM8350_SID << 8 | 0x0b)
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#define PM8350_ADC7_GPIO3 (PM8350_SID << 8 | 0x0c)
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#define PM8350_ADC7_GPIO4 (PM8350_SID << 8 | 0x0d)
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/* 30k pull-up1 */
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#define PM8350_ADC7_AMUX_THM1_30K_PU (PM8350_SID << 8 | 0x24)
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#define PM8350_ADC7_AMUX_THM2_30K_PU (PM8350_SID << 8 | 0x25)
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#define PM8350_ADC7_AMUX_THM3_30K_PU (PM8350_SID << 8 | 0x26)
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#define PM8350_ADC7_AMUX_THM4_30K_PU (PM8350_SID << 8 | 0x27)
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#define PM8350_ADC7_AMUX_THM5_30K_PU (PM8350_SID << 8 | 0x28)
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#define PM8350_ADC7_GPIO1_30K_PU (PM8350_SID << 8 | 0x2a)
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#define PM8350_ADC7_GPIO2_30K_PU (PM8350_SID << 8 | 0x2b)
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#define PM8350_ADC7_GPIO3_30K_PU (PM8350_SID << 8 | 0x2c)
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#define PM8350_ADC7_GPIO4_30K_PU (PM8350_SID << 8 | 0x2d)
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/* 100k pull-up2 */
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#define PM8350_ADC7_AMUX_THM1_100K_PU (PM8350_SID << 8 | 0x44)
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#define PM8350_ADC7_AMUX_THM2_100K_PU (PM8350_SID << 8 | 0x45)
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#define PM8350_ADC7_AMUX_THM3_100K_PU (PM8350_SID << 8 | 0x46)
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#define PM8350_ADC7_AMUX_THM4_100K_PU (PM8350_SID << 8 | 0x47)
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#define PM8350_ADC7_AMUX_THM5_100K_PU (PM8350_SID << 8 | 0x48)
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#define PM8350_ADC7_GPIO1_100K_PU (PM8350_SID << 8 | 0x4a)
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#define PM8350_ADC7_GPIO2_100K_PU (PM8350_SID << 8 | 0x4b)
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#define PM8350_ADC7_GPIO3_100K_PU (PM8350_SID << 8 | 0x4c)
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#define PM8350_ADC7_GPIO4_100K_PU (PM8350_SID << 8 | 0x4d)
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/* 400k pull-up3 */
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#define PM8350_ADC7_AMUX_THM1_400K_PU (PM8350_SID << 8 | 0x64)
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#define PM8350_ADC7_AMUX_THM2_400K_PU (PM8350_SID << 8 | 0x65)
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#define PM8350_ADC7_AMUX_THM3_400K_PU (PM8350_SID << 8 | 0x66)
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#define PM8350_ADC7_AMUX_THM4_400K_PU (PM8350_SID << 8 | 0x67)
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#define PM8350_ADC7_AMUX_THM5_400K_PU (PM8350_SID << 8 | 0x68)
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#define PM8350_ADC7_GPIO1_400K_PU (PM8350_SID << 8 | 0x6a)
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#define PM8350_ADC7_GPIO2_400K_PU (PM8350_SID << 8 | 0x6b)
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#define PM8350_ADC7_GPIO3_400K_PU (PM8350_SID << 8 | 0x6c)
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#define PM8350_ADC7_GPIO4_400K_PU (PM8350_SID << 8 | 0x6d)
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/* 1/3 Divider */
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#define PM8350_ADC7_GPIO4_DIV3 (PM8350_SID << 8 | 0x8d)
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#define PM8350_ADC7_VPH_PWR (PM8350_SID << 8 | 0x8e)
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#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H */
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