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![Stefan Wahren](/assets/img/avatar_default.png)
The function qcaspi_tx_cmd() is only called from qca_spi.c. So we better move it there. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: David S. Miller <davem@davemloft.net>
71 lines
2.4 KiB
C
71 lines
2.4 KiB
C
/*
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* Copyright (c) 2011, 2012, Qualcomm Atheros Communications Inc.
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* Copyright (c) 2014, I2SE GmbH
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*
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* Permission to use, copy, modify, and/or distribute this software
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* for any purpose with or without fee is hereby granted, provided
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* that the above copyright notice and this permission notice appear
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* in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
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* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL
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* THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
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* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT,
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* NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
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* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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/* Qualcomm Atheros SPI register definition.
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*
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* This module is designed to define the Qualcomm Atheros SPI
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* register placeholders.
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*/
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#ifndef _QCA_7K_H
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#define _QCA_7K_H
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#include <linux/types.h>
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#include "qca_spi.h"
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#define QCA7K_SPI_READ (1 << 15)
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#define QCA7K_SPI_WRITE (0 << 15)
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#define QCA7K_SPI_INTERNAL (1 << 14)
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#define QCA7K_SPI_EXTERNAL (0 << 14)
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#define QCASPI_CMD_LEN 2
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#define QCASPI_HW_PKT_LEN 4
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#define QCASPI_HW_BUF_LEN 0xC5B
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/* SPI registers; */
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#define SPI_REG_BFR_SIZE 0x0100
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#define SPI_REG_WRBUF_SPC_AVA 0x0200
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#define SPI_REG_RDBUF_BYTE_AVA 0x0300
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#define SPI_REG_SPI_CONFIG 0x0400
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#define SPI_REG_SPI_STATUS 0x0500
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#define SPI_REG_INTR_CAUSE 0x0C00
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#define SPI_REG_INTR_ENABLE 0x0D00
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#define SPI_REG_RDBUF_WATERMARK 0x1200
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#define SPI_REG_WRBUF_WATERMARK 0x1300
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#define SPI_REG_SIGNATURE 0x1A00
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#define SPI_REG_ACTION_CTRL 0x1B00
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/* SPI_CONFIG register definition; */
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#define QCASPI_SLAVE_RESET_BIT BIT(6)
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/* INTR_CAUSE/ENABLE register definition. */
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#define SPI_INT_WRBUF_BELOW_WM BIT(10)
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#define SPI_INT_CPU_ON BIT(6)
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#define SPI_INT_ADDR_ERR BIT(3)
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#define SPI_INT_WRBUF_ERR BIT(2)
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#define SPI_INT_RDBUF_ERR BIT(1)
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#define SPI_INT_PKT_AVLBL BIT(0)
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void qcaspi_spi_error(struct qcaspi *qca);
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int qcaspi_read_register(struct qcaspi *qca, u16 reg, u16 *result);
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int qcaspi_write_register(struct qcaspi *qca, u16 reg, u16 value);
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#endif /* _QCA_7K_H */
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